We investigate the disorder properties of two-dimensional hole gases in Ge/SiGe heterostructures grown on Ge wafers, using thick SiGe barriers to mitigate the influence of the semiconductor-dielectric interface. Across several heterostructure field effect transistors, we measure an average maximum mobility of ( 4.4 ± 0.2 ) × 10 6 cm 2 / Vs at a saturation density of ( 1.72 ± 0.03 ) × 10 11 cm − 2 , corresponding to a long mean free path of ( 30 ± 1 ) μ m . The highest measured mobility is 4.68 × 10 6 cm 2 / Vs . We identify uniform background impurities and interface roughness as the dominant scattering mechanisms limiting mobility in a representative device, and we evaluate a percolation-induced critical density of ( 4.5 ± 0.1 ) × 10 9 cm − 2 . This low-disorder heterostructure, according to simulations, may support the electrostatic confinement of holes in gate-defined quantum dots.@en

Charge noise in the host semiconductor degrades the performance of spin-qubits and poses an obstacle to control large quantum processors. However, it is challenging to engineer the heterogeneous material stack of gate-defined quantum dots to improve charge noise systematically. Here, we address the semiconductor-dielectric interface and the buried quantum well of a ²⁸Si/SiGe heterostructure and show the connection between charge noise, measured locally in quantum dots, and global disorder in the host semiconductor, measured with macroscopic Hall bars. In 5 nm thick ²⁸Si quantum wells, we find that improvements in the scattering properties and uniformity of the two-dimensional electron gas over a 100 mm wafer correspond to a significant reduction in charge noise, with a minimum value of 0.29 ± 0.02 μeV/Hz^½ at 1 Hz averaged over several quantum dots. We extrapolate the measured charge noise to simulated dephasing times to CZ-gate fidelities that improve nearly one order of magnitude. These results point to a clean and quiet crystalline environment for integrating long-lived and high-fidelity spin qubits into a larger system.

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