Integrated Temperature Sensors based on Heat Diffusion

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Abstract

This thesis describes the theory, design and implementation of a new class of integrated temperature sensors, based on heat diffusion. In such sensors, temperature is sensed by measuring the time it takes for heat to diffuse through silicon. An on-chip thermal delay can be determined by geometry and the thermal diffusivity of silicon, and since the thermal diffusivity of crystalline silicon is strongly temperature-dependent, the thermal delay is also temperature dependent. The sensor structures that measure such delays are known as Electrothermal Filters (ETFs). The field of temperature sensing using ETFs is still relatively unexplored. This thesis expands upon recent proof-of-concept research by studying the performance of ETF-based temperature sensors in more detail. Its main goal is to analyze whether or not ETFs can be used as competitive temperature sensors in CMOS technology. The thermal delay in an ETF can be very well-defined, since the silicon used in IC fabrication is highly pure, and the lithographic inaccuracy with which planar structures can be made is constantly improving. ETFs thus scale along the trend of Moore’s law, and they can become smaller, faster and more accurate in more advanced CMOS technologies. The main application of ETF-based temperature sensors is the thermal management of microprocessors: modern microprocessors require tens of small, fast and accurate temperature sensors to prevent overheating and to dynamically allocate processing power. Chapter 1 outlines this and other applications in some detail, and shows why existing temperature sensors are not well-suited for these applications. Chapter 2 presents the theoretical background to ETFs, starting with a discussion on the thermal diffusivity of silicon and silicon dioxide, analyzing their nominal values and their (different) temperature dependencies. It then discusses what type of ETFs to use to measure these most accurately. Furthermore, it outlines a family of performance metrics that enable a more formal study of ETFs characteristics. These are divided in two main categories: accuracy (e.g. error due to lithography, doping sensitivity) and resolution (how to optimize signal-to-noise ratio (SNR), advantages of scaling and using thermally isolated technologies such as silicon-on-insulator (SOI) processes). Chapter 3 presents various systems that can be built around ETFs. Using either silicon ETFs, oxide ETFs or a combination of both, several systems can be built, each with different functionality. The two systems described in most detail are the single silicon-ETF temperature-to-digital converter, and the silicon and oxide ETF-based self-referenced temperature-to-digital converter. The former uses an accurate time reference (such as a crystal oscillator) to convert an ETF’s thermal delay to an absolute temperature measurement. The latter performs a ratiometric temperature measurement and does not require an external time reference. This chapter also defines all of the circuit building blocks required to implement these systems, and derives their specifications from ETF theory and first principles. It concludes by showing that phase-domain sigma-delta modulators (PD??Ms) are the most appropriate readout circuits for precision ETF readout. Chapter 4 discusses PD??Ms in more detail and presents their transistor-level implementation. PD??Ms are a class of time-to-digital converters that are well-suited to digitize the thermal delay contained in the small, noisy signal at the ETF’s output. High precision and resolution are achieved by oversampling, noise shaping and the use of dynamic error correction techniques. Several methods of linearizing ETF-based temperature-to-digital converters are also presented. The chapter ends with measurements on a standalone PD??M, in order to show that its measurement error is sufficiently low to be able to characterize ETFs. Chapter 5 presents the measurement results for the ETFs studied in this thesis. There are results on ETF inaccuracy and resolution as a function of geometry and process technology, as well as results on sensitivity to doping fluctuations, mechanical stress, thermal interference and self-heating. The measured differences in ETF performance in bulk CMOS and SOI CMOS technology are also presented and analyzed. The lowest measured untrimmed inaccuracy for a single-ETF sensor in 0.18?m CMOS technology was ±0.2ºC (3?) from -55ºC to 125ºC. A self-referenced sensor, based on measuring the ratio of the thermal delay in silicon over that in oxide, shows a measured inaccuracy of ±0.4ºC (3?) from -70ºC to 200ºC after a one-point trim. Chapter 6 lists the main findings of this thesis and uses the measurement results to draw some conclusions on the competitiveness of ETFs. It shows that ETFs, due to their scalability, are attractive for thermal management of SoCs in deep submicron CMOS technologies. This thesis ends with some recommendations for further research.