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C++ based design flow for reconfigurable image processing systems

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Author: Beun, R. · Karkowski, I. · Ditzel, M.
Type:article
Date:2007
Publisher: IEEE
Place: Piscataway, NJ
Institution: TNO Defensie en Veiligheid
Source:2007 International Conference on Field Programmable Logic and Applications, FPL, 27-29 August 2007, Amsterdam, The Netherlands, 571-575
Identifier: 240510
doi: doi:10.1109/FPL.2007.4380719
Keywords: Applications · Computer programming languages · Digital image storage · Image enhancement · Image processing · Imaging systems · Verification · Co designs · Design flows · Design stages · Hardware components · Processing systems · Reconfigurable images · Semi automatics · SystemC · Computer software

Abstract

In this paper a new hardware-software co-design flow for FPGA based image processing systems is described. This flow is fully C++ based and allows specification, verification and semi-automatic generation of all necessary software and hardware components. It allows the involvement of algorithm developers in the majority of the design stages, without requiring hardware knowledge. The application is modeled in C++ using a SystemC framework. The user defined blocks are automatically converted to VHDL using the CatapultC synthesizer. The flow has been applied to two representative image enhancement functions. © 2007 IEEE.