Robust Wafer-Level Thin-Film Encapsulation (Packaging) of Microstructures (MEMS) using Low Stress PECVD Silicon Carbide

This paper presents a new low-cost, CMOS-compatible and robust wafer-level encapsulation technique developed using a stress-optimised PECVD SiC as the capping and sealing material, imparting harsh environment capability. This technique has been applied for the fabrication and encapsulation of a wide variety of surface- and thin-SOI...

SOI Digital Accelerometer Based on Pull-in Time Configuration

The operation principle, design, fabrication and measurement results of a quasi digital accelerometer fabricated on a thin silicon-on-insulator (SOI) substrate is presented. The accelerometer features quasi-digital output, therefore eliminating the need for analogue signal conditioning. The accelerometer can be directly interfaced to digital...

Simple optical characterisation for biomimetic micromachined silicon strain-sensing structure

This paper presents an on-going work to develop micromachined silicon-based strain sensor inspired from the campaniform sensillum of insects. We present simple optical setup for the characterisation of a membrane-in-recess structure as an early stage in mimicking the natural sensor. The microstructure is a 500 nm-thick SiO2/SiN circular membrane...