Searched for: subject%3A%22testing%22
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document
Cromjongh, Casper (author), Tian, Y. (author), Hofstee, H.P. (author), Al-Ars, Z. (author)
In spite of progress on hardware design languages, the design of high-performance hardware accelerators forces many design decisions specializing the interfaces of these accelerators in ways that complicate the understanding of the design and hinder modularity and collaboration. In response to this challenge, Tydi is presented as an open...
conference paper 2023
document
Mokveld, T.O. (author), Al-Ars, Z. (author), Sistermans, Erik A. (author), Reinders, M.J.T. (author)
In prenatal diagnostics, NIPT screening utilizing read coverage-based profiles obtained from shallow WGS data is routinely used to detect fetal CNVs. From this same data, fragment size distributions of fetal and maternal DNA fragments can be derived, which are known to be different, and often used to infer fetal fractions. We argue that the...
journal article 2022
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Zandrahimi, M. (author), Debaud, Philippe (author), Castillejo, Armand (author), Al-Ars, Z. (author)
With the continued down-scaling of IC technology and increase in manufacturing process variations, it is becoming ever more difficult to accurately estimate circuit performance of manufactured devices. This poses significant challenges on the effective application of adaptive voltage scaling (AVS) which is widely used as the most important...
journal article 2019
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Al-Ars, Z. (author), Hamdioui, S. (author), Gaydadjiev, G. (author), Vassiliadis, S. (author)
Up to 53% of the time spent on testing current Intel microprocessors is needed to test on-chip caches, due to the high complexity of memory tests and to the large amount of transistors dedicated to such memories. This paper discusses the methodology used to develop effective and efficient cache tests, and the way it is implemented to optimize...
journal article 2008
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Hamdioui, S. (author), Al-Ars, Z. (author), Jimenez, J. (author), Calero, J. (author)
This paper summarizes advanced test patterns designed to target dynamic and time-related faults caused by new defect mechanisms in deep-submicron memory technologies. Such tests are industrially evaluated together with the traditional tests at "Design of Systems on Silicon (DS2)" in Spain in order to (a) validate the used fault models and (b)...
conference paper 2007
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Al-Ars, Z. (author)
Dynamic random access memories (DRAMs) are the most widely used type of memory in the market today, due to their important application as the main memory of the personal computer (PC). These memories are tested by their manufacturers in an ad hoc way, that results in an expensive test process the price of which is ultimately paid by the end...
doctoral thesis 2005
Searched for: subject%3A%22testing%22
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