aEEG analog front end IC for a neonatal brain development monitoring

Abstract

Every year number of prematurely born infants grows. Most underdeveloped organ after birth is brain. Therefore its monitoring is very important, especially as it can provide indications about health state in a future, both short and long term. Non invasive method of brain monitoring is EEG recording. However tedious process of system set up and short time of recording discourage doctors to use it in daily care. Good alternative is aEEG measurement. Number of electrodes is reduced to 5 including ground node and signal interpretation is much easier. Main advantage of the system is high correlation between aEEG readouts and raw EEG signal. Although aEEG is already well known and accepted in neonatology, it is still not used to monitor every patient. Problem is high price of a device starting from 30000 euro. In a result, hospital is not able to provide proper monitoring for each and every patient. For this reason, main task of this thesis is to propose cheaper version of a system. The system can be divided into two prats. Analog front end and digital part providing signal processing. There are plenty of cheap development boards that can be used as digital part, therefore focus of this project was set on analog front end. In order to propose cheap design, minimal requirements have to be specified. Two tests were performed. First one was to identify interferences disturbing aEEG recording in the worst case scenario, when patient is inside an incubator and all monitoring devices are turned on. For this purpose, a phantom mimicking neonate’s body conductivity and size was constructed. Results showed that differential method of obtaining the signal is necessary for biosignals which amplitude is in 𝜇V. Only registered interference was 50Hz spike coming from the mains. Noise floor peak to peak amplitude was measured on 1𝜇V level, while magnitude of 50Hz spike was on the level of 9𝜇V for devices turned off and 25𝜇V for devices turned on. Big influence on the recording has phantom location as well. If phantom was in direct neighbourhood of devices connected to power line, 50Hz spike raised to 90𝜇V level and several harmonics of the main tone appeared. By putting phantom 2 meters away, main tone’s magnitude dropped to 2𝜇V level and all of the harmonics were gone. Second performed test was resolution test. Real raw EEG signal was applied on the Simulink model analog to digital converter in order to identify what is minimal number of bits required for proper signal acquisition. Tests showed that in order to keep the number of bits low, amplification of the signal is required. For signal directly applied on the ADC 18bit resolution was required for proper signal acquisition. Amplification by factor of 1000 allowed to reduced this value to 7bits. Proposed system consists of amplifying stage realising 60dB gain with high pass cut off filtration and ADC. Amplifying stage is realised by amplifier providing 35dB gain with filtration below 2Hz and second amplifier realising 25dB gain. ADC is implemented by continuous time second order Sigma Delta Modulator. Proposed system was designed in CMOS 0.18𝜇 and h18a6am technology. Tests of full system showed SNR no lower than 51dB, power consumption of 217.5𝜇V. Input stage has CMRR of 113dB and input impedance above 2.25GΩ for the bandwidth 2-15Hz. System reliability was checked with corner analysis and wide range of temperatures. Results showed small variations of SNR.