This article presents a fully dynamic scalable switched-capacitor delta-sigma modulator that achieves a 94.1-dB dynamic range (DR). Power-and- bandwidth scalability by only changing the clock frequency is achieved using a capacitively biased and swing-enhanced floating inverter operational transconductance amplifier (OTA). Fabricated in a 180-nm CMOS process, the prototype achieves an signal-to-noise-and-distortion ratio (SNDR) of >87 dB across 4× scaling from 100 to 400 kHz of the sampling frequency f_ S. At 200-kHz f_ S , it achieves an SNDR/DR of 89.3/94.1 dB while consuming 4 μ W , leading to a DR-based Schreier figure of merit (FoM) of 177.1 dB. @en

IoT sensing applications operating from batteries or harvested energy require microwatt data converters. To accurately measure small signals, they often need to achieve a high DR (>90dB) and better linearity than the transducers themselves (>14b) with a BW in the kHz range. IoT systems also often consist of multiple sensing modalities with different BW requirements and are often heavily duty-cycled to reduce power consumption. This paper presents a fully dynamic discrete-time delta-sigma modulator (DTDSM) that supports 4x bandwidth/power scaling without any programming overhead except for changing fs, using a capacitively biased swing-enhanced floating inverter amplifier (SEFIA). The prototype, fabricated in 180nm CMOS, consumes only 4μW at 800Hz BW and achieves >87dB SNDR over 2 octaves of fs, between 100 kHz and 400 kHz, and a DR of 94.1 dB while operating with an OSR of 125.@en