Comparative analysis of soft and hard on-chip interconnects for FPGAs

Buffered crossbar fabrics based on network on chip

Performance guarantees in partially buffered crossbar switches

Resource discovery with dynamic matchmakers in ad hoc grid

On the integration of unicast and multicast cell scheduling in buffered crossbar switches

Internet-router buffered crossbars based on network on chip

Efficient multicast support in buffered crossbars using network on chip

PBC: a partially buffered crossbar packet switch

Distributed parallel scheduling algorithms for high speed virtual output queuing switches

Performance analyses of soft and hard single-hop and multi-hop circuit-switched interconnects for FPGAs

A partially buffered crossbar packet switching architecture and its scheduling

Efficient multicast support in high-speed packet switches

Scheduling in high performance buffered crossbar switches

Integrating uni-and multicast scheduling in buffered crossbar switches

Trends in tests and failure mechanisms in deep sub-micron technologies

Multicast traffic scheduling based on high-speed crossbar switches

A reconfigurable hardware based embedded scheduler for buffered crossbar switches

High-performance switching based on buffered crossbar fabrics

Architecture of high speed switches and internet routers

A practical scheduler for high-speed packet switches and internet routers