Towards the integration of carbon nanotubes as vias in monolithic three-dimensional integrated circuits

Aluminum-induced iso-epitaxy of silicon for low-temperature fabrication of centimeter-large p+n junctions

Integrating low-temperature carbon nanotubes as vertical interconnects in Si technology

VUV/low-energy electron Si photodiodes with postmetal 400°C PureB deposition

Epitaxial growth of large-area p+n diodes at 400 ºC by aluminum-induced crystallization

Electrical characterization of carbon nanotube vertical interconnects with different lengths and widths

Integrating carbon nanotubes as vias in a monolithic 3DIC process

Low-temperature bottom-up integration of carbon nanotubes for vertical interconnects in monolithic 3D integrated circuits

Low-complexity full-melt laser-anneal process for fabrication of low-leakage implanted ultrashallow junctions

Integration of MOSFETs with SiGe dots as stressor material

Electrical characterisation of low temperature aligned carbon nanotubes for vertical interconnects

Integrating low temperature aligned carbon nanotubes as vertical interconnects in Si technology

Excimer laser crystallization of thick a-Si for photodiode and solar cell applications

N-channel MOSFETS fabricated on self assembled SiGe dots for strain-enhanced moblity

Thermal budget considerations for excimer laser annealing of implanted dopants

Strained single grain silicon n- and p- channel thin-film transistors by excimer laser

Location- and orientation-controlled, large single grain silicon induced by pulsed excimer laser crystallization

n-Channel MOSFETs fabricated on SiGe dots for strain-enhanced mobility

High performance single-grain Ge TFTs without seed substrate

Patterned growth of carbon nanotubes for vertical interconnects in 3D integrated circuits