To efficiently select qualification and reliability monitoring programs, structural similarity rules for Integrated Circuit designs, wafer fabrication processes and/or package designs are currently used by the industry. By following the package structural similarity rules, the numbers of reliability qualification tests may be greatly reduced. However, when looking at the present rules it is clear that they are not reliably defined. For instance, geometrical parameters such as die-to-pad ratio are not quantitatively included and it seems that linear relationships are assumed. Besides that, these rules are mainly deducted from experience and industrial trial and error results, not from reliability physics. Driven by the present development trends of microelectronics (miniaturization, integration, cost reduction, etc) it is urgently needed to develop `advanced based structural similarity rules¿ based on reliability physics (physics of failures), to meet the industrial development trends. In this study, we have used DOE/RMS techniques to deduct advanced structural similarity rules through simulation-based optimisation techniques. Parametric 3D non-linear FE models are used to explore the responses of the complete ball grid array (BGA) package family for both the thermo-mechanical and moisture-diffusion responses as function of six parameters among which the die-to-pad ratio and the body size. In this way, advanced structural similarity rules are deduced which can be used to shorten design cycles. Even more, by using the accurate 3D non-linear reliability prediction models easy tools can be created for package designers. By using such a tool, the number of reliability qualification tests can be reduced. More importantly, possible failure mechanisms can be (better) understood and predicted.

For integrated circuit (IC) wafer back-end development, state-of-the-art CMOS-technologies have to be developed and robust bond pad structures have to be designed in order to guarantee both functionality and reliability during waferfab processes, packaging, qualification tests, and, of course, usage. It is now well established that for future CMOS-technologies (CMOS065 and beyond), low-k dielectric materials will be integrated in the back-end structures. However, bad thermal and mechanical integrity as well as weak interfacial adhesion result in major thermo-mechanical reliability issues. Especially the forces resulting from packaging related processes such as dicing, wire bonding, bumping and molding are critical and can easily induce cracking, delamination and chipping of the IC back-end structure when no appropriate precautions are taken. This paper presents an efficient method to describe the damage sensitivity of three-dimensional multi-layered structures. The index that characterizes this failure sensitivity is an energy measure called the Area Release Energy, which predicts the amount of energy that is released upon crack initiation at an arbitrary position along an interface. The benefits of the method are: (1) the criterion can be used as damage sensitivity indicator for complex three-dimensional structures; (2) the criterion is energy-based, thus more accurate than stress-based criteria; (3) unlike recent fracture mechanics approaches, no initial defect size and location has to be assumed a priori. A mesh objectivity condition is formulated resulting from numerical experiments. The method is applied to advanced IC back-end structures, revealing not only the most critical back-end design but also the critical interfaces in the bond pad structures at which delamination might occur. In order to bridge the length scale difference between the wafer level and the back-end structures, a multi-scale method has been implemented in the finite element code MSC.Marc. In this way, effects of e.g., packaging and wire bond loading at the global level can be studied while taking into account the possibility of occurring failure phenomena at the local, back-end level. The validity and applicability of the method will be demonstrated by considering several Cu/low-k back-end structures. The obtained results are in good agreement with experimental observations.

Currently, prediction of interface strength is typically done using the critical energy release rate. Interface strength, however, is heavily dependent on mode mixity. Accurately predicting delamination therefore requires a material model that includes the mode dependency of interface strength. A novel test setup is designed which allows mixed mode delamination testing. The setup is a stabilized version of the mixed mode bending test previously described by Reeder and Crews [5.6]. It allows for the measurement of stable crack growth over the full range of mode mixities, using a single specimen design. The crack length, necessary for calculation of the energy release rate, is obtained from an analytical model. Crack length and displacement data are used in a finite element model containing a crack tip to calculate the mode mixity.