An Inductorless Power-Optimized Dual-Mode LNTA in a GNSS Receiver for Portable Devices

Abstract

There is a great increasing demand to embed GNSS receivers on portable devices, because they can provide much higher positioning accuracy and better availability compared with GPS-only receivers. However, portable devices have strong limitations on power consumption and area. In order to realize a low power and compact GNSS receiver, this paper presents both system level and circuit level solutions. In the system level, a two-state GNSS receiver architecture is introduced with acquisition phase and tracking phase to optimize the power consumption. In the circuit level, a dual-mode inductorless LNTA with adaptive bias and with an active inductor for gain boosting is proposed. This LNTA is designed and layout in a 40nm CMOS technology.