Risotto

A Dynamic Binary Translator for Weak Memory Model Architectures

Conference Paper (2022)
Author(s)

Redha Gouicem (Technische Universität München)

D.G. Sprokholt (TU Delft - Programming Languages)

Jasper Ruehl (Technische Universität München)

Rodrigo C.O. Rocha (The University of Edinburgh)

Tom Spink (University of St Andrews)

S.S. Chakraborty (TU Delft - Programming Languages)

Pramod Bhatotia (Technische Universität München)

Research Group
Programming Languages
Copyright
© 2022 Redha Gouicem, D.G. Sprokholt, Jasper Ruehl, Rodrigo C.O. Rocha, Tom Spink, S.S. Chakraborty, Pramod Bhatotia
DOI related publication
https://doi.org/10.1145/3567955.3567962
More Info
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Publication Year
2022
Language
English
Copyright
© 2022 Redha Gouicem, D.G. Sprokholt, Jasper Ruehl, Rodrigo C.O. Rocha, Tom Spink, S.S. Chakraborty, Pramod Bhatotia
Research Group
Programming Languages
Bibliographical Note
Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public. @en
Pages (from-to)
107-122
ISBN (electronic)
978-1-4503-9915-9
Reuse Rights

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Abstract

Dynamic Binary Translation (DBT) is a powerful approach to support cross-architecture emulation of unmodified binaries. However, DBT systems face correctness and performance challenges, when emulating concurrent binaries from strong to weak memory consistency architectures. As a matter of fact, we report several translation errors in QEMU, when emulating x86 binaries on Arm hosts. To address these challenges, we propose an end-to-end approach that provides correct and efficient emulation for weak memory model architectures. Our contributions are twofold: we formalize QEMU's intermediate representation's memory model, and use it to propose formally verified mapping schemes to bridge the strong-on-weak memory consistency mismatch. Secondly, we implement these verified mappings in Risotto, a QEMU-based DBT system that optimizes memory fence placement while ensuring correctness. Risotto further enhances the emulation performance via cross-architecture dynamic linking of native shared libraries, and fast and correct translation of compare-and-swap operations. We evaluate Risotto using multi-threaded benchmark suites and real-world applications, and show that Risotto improves the emulation performance by 6.7% on average over "erroneous"QEMU, while ensuring correctness.

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