Detailed derivation and minimization of the equivalent parasitic capacitances of a high-voltage multiplier based on the complete model
Journal Article
(2015)
Author(s)
J Wang (TU Delft - Electrical Power Processing)
S.W.H. de Haan (TU Delft - Electrical Power Processing)
Braham Ferreira (TU Delft - Electrical Power Processing)
Research Group
Electrical Power Processing
DOI related publication
https://doi.org/10.1109/TIA.2014.2330060
To reference this document use:
https://resolver.tudelft.nl/uuid:5ca6163e-8d71-4806-887d-2ca0e839b53a
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Publication Year
2015
Language
English
Research Group
Electrical Power Processing
Issue number
1
Volume number
51
Pages (from-to)
362-372
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