SCRAMBLE

A Secure and Configurable, Memristor-Based Neuromorphic Hardware Leveraging 3D Architecture

Conference Paper (2022)
Author(s)

Nikhil Rangarajan (New York University Abu Dhabi)

Satwik Patnaik (Texas A&M University)

Mohammed Nabeel (New York University Abu Dhabi)

Mohammed Ashraf (New York University Abu Dhabi)

Shubham Rai (Technische Universität Dresden)

Gopal Raut (Indian Institute of Technology Indore)

Heba Abunahla (Khalifa University of Science and Technology)

Baker Mohammad (Khalifa University of Science and Technology)

Santosh Kumar Vishvakarma (Indian Institute of Technology Indore)

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Affiliation
External organisation
DOI related publication
https://doi.org/10.1109/ISVLSI54635.2022.00067 Final published version
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Publication Year
2022
Language
English
Affiliation
External organisation
Pages (from-to)
308-313
Publisher
IEEE
ISBN (electronic)
9781665466059
Event
2022 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2022 (2022-07-04 - 2022-07-06), Pafos, Cyprus
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Abstract

In this work we present SCRAMBLE, a configurable neuromorphic architecture that provides security against different threats by employing memristors for critical parts and functions. More specifically, we employ memristive memory cells - that are 3D stacked on top of the configurable neuromorphic hardware - to securely hold the weights as well as activation functions of any model processed on the generalized architecture. Thus, programmable memristive cells enable reconfiguration of the architecture to thwart both model stealing and hardware IP stealing attacks. We implement a proof-of-concept for the proposed architecture and analyze its security metrics. We also benchmark it against selected prior art for neuromorphic architectures to quantify the security-performance trade-offs.