SDFT Based PMU Prototype

Master Thesis (2018)
Author(s)

I. Radević (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Contributor(s)

Marjan Popov – Mentor

Matija Naglic – Mentor

Faculty
Electrical Engineering, Mathematics and Computer Science
Copyright
© 2018 Isidora Radević
More Info
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Publication Year
2018
Language
English
Copyright
© 2018 Isidora Radević
Graduation Date
18-07-2018
Awarding Institution
Delft University of Technology
Programme
['European Wind Energy Masters (EWEM)']
Faculty
Electrical Engineering, Mathematics and Computer Science
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Abstract

Presently, phasor measurement units (PMUs) are the most accurate and advanced time-synchronized technology. PMUs are the main element of the Wide-Area Monitoring, Protection and Control System, the concept that provides an estimate of the actual condition of the system, allowing operators to run online simulations and determine the possibility of cascading events, the voltage values outside the limits, while the operator is still able to take proper actions, preventing the system blackout. However, for achieving complete observability of a power network, PMUs should be installed at about one-third of the total number of network buses. Due to the high expenses, TSOs and DSOs are not willing to integrate PMUs in the large scale. Consequently, by covering only small portions of the power grid, detailed snapshot of the power grid condition is not possible and complete benefit of such advanced monitoring units cannot be gained. This was the source of the motivation for presented master thesis. The contribution of the thesis is a development of the low-cost Phasor Measurement Unit, which performance complies with the IEEE C37.118.1 standard requirements. The prototype is based on Smart Discrete Fourier Transform technique for synchrophasor estimation.The algorithm is running on the embedded voltage sensor developed in Smart State Technology. During the research, the main question was how accurate performance of the prototype can be obtained by optimization of the algorithm to the processing power of the embedded sensor. The most optimal solution for staying within the sensor processing limitations and at the same time achieving the accurate performance of the algorithm is found in ADC sampling rate of 1kHz, non-recursive DFT approach and mean filtering performed on SDFT frequency estimates.

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