Effective reconfigurable design
The FASTER approach
D. N. Pnevmatikatos (Foundation for Research and Technology - Hellas (FORTH))
T. Becker (Imperial College London)
A. Brokalakis (Synelixis)
G. N. Gaydadjiev (Chalmers University of Technology)
W. Luk (Imperial College London)
K. Papadimitriou (Foundation for Research and Technology - Hellas (FORTH))
I. Papaefstathiou (Synelixis)
D. Pau (STMicroelectronics)
Oliver Pell (Maxeler Technologies Ltd.)
C. Pilato (Politecnico di Milano)
M. D. Santambrogio (Politecnico di Milano)
D. Sciuto (Politecnico di Milano)
D. Stroobandt (Universiteit Gent)
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Abstract
While fine-grain, reconfigurable devices have been available for years, they are mostly used in a fixed functionality, "asic-replacement" manner. To exploit opportunities for flexible and adaptable run-time exploitation of fine grain reconfigurable resources (as implemented currently in dynamic, partial reconfiguration), better tool support is needed. The FASTER project aims to provide a methodology and a tool-chain that will enable designers to efficiently implement a reconfigurable system on a platform combining software and reconfigurable resources. Starting from a high-level application description and a target platform, our tools analyse the application, evaluate reconfiguration options, and implement the designer choices on underlying vendor tools. In addition, FASTER addresses micro-reconfiguration, verification, and the run-time management of system resources. We use industrial applications to demonstrate the effectiveness of the proposed framework and identify new opportunities for reconfigurable technologies.