DIM-VEX

Exploiting Design Time Configurability and Runtime Reconfigurability

Conference paper (2018)

Authors

J. Dellagostin Souza Universidade Federal do Rio Grande do Sul
A.L. Sartor Universidade Federal do Rio Grande do Sul
Luigi Carro Universidade Federal do Rio Grande do Sul
MB Rutzig Universidade Federal de Santa Maria
J.S.S.M. Wong Computer Engineering - EEMCS
Antonio C.S. Beck Universidade Federal do Rio Grande do Sul
Research Group
Computer Engineering (EEMCS) (TU Delft)
Binary translation Reconfigurable accelerator Configurable processor Binary compatibility
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Published Date

2018

Language

English

Reuse Rights

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Quantum & Computer Engineering

Research Group

Computer Engineering

Abstract

Embedded processors must efficiently deliver performance at low energy consumption. Both configurable and reconfigurable techniques can be used to fulfill such constraints, although applied in different situations. In this work, we propose DIM-VEX, a configurable processor coupled with a reconfigurable fabric, which can leverage both design time configurability and runtime reconfigurability. We show that, on average, such system can improve performance by up to 1.41X and reduce energy by up to 60% when compared to a configurable processor at the cost of additional area.