Effects of Parasitic Resistance on the Performance of Silicon Avalanche Photodetectors in Standard CMOS Technology

Journal article (2015)

Authors

M.J. Lee (OLD)Applied Quantum Architectures

Woo-Young Choi Yonsei University

Research Group

(OLD)Applied Quantum Architectures

Photodiode Image sensor CMOS integrated circuits Avalanche photodiode Equivalent circuit model Avalanche gain, Avalanche photodetector (APD) Inductive peaking Integrated circuit modeling Optical interconnect Parasitic resistance Photodetection bandwidth

To reference this document use:

http://resolver.tudelft.nl/uuid:e16e468a-1e33-4033-8ab5-1a94dd84a96d

More Info

expand_more

Published Date

30-10-2015

Language

English

Reuse Rights

Other than for strictly personal use, it is not permitted to download, forward or distribute the text or part of it, without the consent of the author(s) and/or copyright holder(s), unless the work is under an open content license such as Creative Commons.

Research Group

(OLD)Applied Quantum Architectures

Abstract

We investigate the effects of parasitic resistance on the performance of silicon avalanche photodetectors (APDs) fabricated in the standard complementary metal-oxide-semiconductor (CMOS) technology. Two types of CMOS-APDs based on the P+/N-well junction having two different parasitic resistances are realized, and their current-voltage characteristics, responsivities, avalanche gains, photodetection frequency responses, and electrical reflection coefficients are measured and compared. In addition, the effect of parasitic resistance on the photodetection bandwidth is analyzed with an equivalent circuit model. It is clearly demonstrated that the parasitic resistance has great effects on the gain and photodetection bandwidth of CMOS-APDs.