Characterization of standard cell libraries in cryogenic applications

Master Thesis (2018)
Author(s)

H.J.C. Kroep (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Contributor(s)

E Charbon – Mentor

Faculty
Electrical Engineering, Mathematics and Computer Science
Copyright
© 2018 Kees Kroep
More Info
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Publication Year
2018
Language
English
Copyright
© 2018 Kees Kroep
Graduation Date
17-12-2018
Awarding Institution
Delft University of Technology
Programme
['Computer Engineering']
Faculty
Electrical Engineering, Mathematics and Computer Science
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Abstract

In order to improve the ability to design digital ICs for cryogenic temperatures, the objective of this work is to characterize the timing performance of standard cells in the TSMC 40nm technology at a temperature range between 4K and 300K. A design was made to perform automated on-chip characterization of standard cell propagation delay, that makes use of random sampling. An ASIC was implemented and fabricated based on this design. A test setup was designed and build to perform the characterization. Besides that a design for a scalable gray-counter was developed and implemented that promises excellent performance for power critical applications.

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