Nano-copper paste filled vertical interconnects

Master Thesis (2017)
Author(s)

Maryam Ahmadi Namin (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Contributor(s)

Rene Poelma – Mentor

Faculty
Electrical Engineering, Mathematics and Computer Science
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Publication Year
2017
Language
English
Graduation Date
17-07-2017
Awarding Institution
Delft University of Technology
Faculty
Electrical Engineering, Mathematics and Computer Science
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Abstract

This project, is aimed at making a device with TSVs (through silicon VIAs) interconnections using a new method based on vacuum filling with conductive nano-copper paste and by testing different diameter sizes and finding the best method and procedure for the fabrication of the chip.
Second ambition is filling the TSV interconnections, with a new and promising material (nano copper paste particles), which is expected to have excellent conductivity and electrical properties, by utilizing a new TSV filling method. Copper, because of having great electrical properties such as conductivity and due to its low expense rather than other materials such as gold and silver, and even though of its high oxidation weakness, is still the currently used material for interconnections in the microelectronics
field.
However, reliable, environmental friendly, and low temperature interconnects rely on the exceptional properties of Metallic Nanoparticle Pastes (MNPs) and recently Copper nanoparticles are investigated as interconnect material. It is possible to combine this nano paste particle usage by microfabrication and lithography and optimizing the fine pitch vertical interconnection by using this promising material. The copper nanoparticles paste used in this project is
CUAN-TUMFUSE, 22.2g SN: 16035. The method used during this project for TSVs filling is a new method by utilizing the Vacuum air machine which sucks the air from one side and pulls out the air from an other side.

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