A 40-Gb/s 2<sup>11</sup>-1 PRBS with Distributed Clocking and a Trigger Countdown Output

None, None; None, None

A 40-Gb/s 2¹¹-1 PRBS with Distributed Clocking and a Trigger Countdown Output

Journal Article (2016)

Author(s)

Leonardo Vera Villarroel (TU Delft - Electronics)

John Long (University of Waterloo)

Dynastat frequency divider Pseudo-random binary sequence (PRBS) generator SiGe heterojunction bipolar transistor (HBT) SiGe-BiCMOS technology Synthetic transmission line Trigger generator

DOI related publication

https://doi.org/10.1109/TCSII.2016.2531091 Final published version

To reference this document use

https://resolver.tudelft.nl/uuid:f677e6e3-1b7e-4dce-9a39-9055320de520

More Info

expand_more

Publication Year

2016

Language

English

Journal title

IEEE Transactions on Circuits and Systems Part 2: Express Briefs

Issue number

8

Volume number

63

Article number

7410032

Pages (from-to)

758-762

Downloads counter

158

Abstract

A 2¹¹-1 pseudo-random binary sequence (PRBS) generator with trigger synchronization output (9.77-MHz rate) is implemented using synthetic transmission lines for the clock distribution. The full-rate data sequence is sourced from a 2:1 multiplex of dual shift register outputs synchronized to a half-rate clock. Quadrature half-rate clocks generated by a dual-mode (Dynastat) divide-by-2 are distributed via the synthetic lines to optimize power-speed tradeoffs in the design. The 790×620μm² PRBS designed in 130-nm SiGe BiCMOS (200/280 GHz f_T/fmax) consumes 250 mA at 2.5 V (i.e., 625 mW).

A 40-Gb/s 211-1 PRBS with Distributed Clocking and a Trigger Countdown Output

Abstract

A 40-Gb/s 2¹¹-1 PRBS with Distributed Clocking and a Trigger Countdown Output