Detailed derivation and minimization of the equivalent parasitic capacitance of a high voltage multiplier based on the complete model
Conference Paper
(2013)
Author(s)
J Wang (TU Delft - Electrical Power Processing)
S.W.H. de Haan (TU Delft - Electrical Power Processing)
Braham Ferreira (TU Delft - Electrical Power Processing)
Research Group
Electrical Power Processing
DOI related publication
https://doi.org/10.1109/ECCE.2013.6646850
To reference this document use:
https://resolver.tudelft.nl/uuid:f6c0d082-c86a-4b16-8f30-a145dbbde859
More Info
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Publication Year
2013
Language
English
Research Group
Electrical Power Processing
Bibliographical Note
Harvest@en
Pages (from-to)
1266-1273
ISBN (print)
978-1-4799-0335-1
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