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Feenstra, Bastiaan (author)In this thesis we explore the acceleration of sorting algorithms on FPGAs using high bandwidth memory (HBM). The target application is an FPGA as an accelerator in an OpenCAPI enabled system, that enables the accelerator to access main memory of the host at a bandwidth of 25 GB/s for either read or write. We explore under what read and write...master thesis 2020
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Overwater, Ramon (author)The quantum bits (qubits) at the core of any quantum computers are so fragile that quantum error correction(QEC) schemes are needed to increase their robustness and enable fault-tolerant quantum algorithms. The surface code is one of the most popular QEC schemes, but it requires the availability of an efficient decoder. While neural networks...master thesis 2019
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Rueda Arjona, Antonio (author)Embedded control systems are processor-based systems that need to run an application for an extended amount of time, such as months or years. Typically, they implement a realtime function to control a system. Embedded systems are implemented using hardware and software to perform an specific task. This is why they can be optimized to reduce its...master thesis 2019
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de Haan, Erwin (author)Despite its advantages in performance and control, hardware design is mainly bottlenecked by high design complexity and long development time. This thesis explores the use of domain specific languages for high-level synthesis (HLS) of hardware data filters and transformations.<br/>The main goal of this thesis’ prototype is automating the...master thesis 2019
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Wijtemans, Lars (author)vailability of FPGAs is increasing due to cloud service offerings. In the wake of a new in-memory storage format specification, Apache Arrow, FPGAs are increasingly interesting for data processing acceleration in the big data domain. The Fletcher framework can be used to easily develop FPGA accelerated applications that access data stored in...master thesis 2019
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van Leeuwen, Lars (author)With the advent of high-bandwidth non-volatile storage devices, the classical assumption that database analytics applications are bottlenecked by CPUs having to wait for slow I/O devices is being flipped around. Instead, CPUs are no longer able to decompress and deserialize the data stored in storage-focused file formats fast enough to keep up...master thesis 2019
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Misdorp, Alexander (author)Visual perception is a pillar of human life. Visual impairment, therefore, has a severe impact on the quality of life. The Bioelectronic Interface to Sensory Cortex (BISC) project is aimed at building a system capable of both recording and stimulating neurons in order to remedy visual impairment. The proposed BISC system consists of three...master thesis 2019
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Geel, Patrick (author), Kleijweg, Zep (author)This project is to design and implement a reconfigurable measurement interface for Internet of Things sensors, for the Microelectronics Department of the Delft University of Technology. This thesis will discuss the functionality and design process taken in designing such a reconfigurable measurement interface, focusing on generating signals and...bachelor thesis 2019
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Noordam, Leon (author)Modular exponentiation is the basis needed to perform RSA encryption and decryption. Execution of 4096-bit modular exponentiation using an embedded system requires many arithmetic operations. This work aims to improve the performance of modular exponentiation for an existing FPGA platform containing a soft core RISC-V processor. The solution is...master thesis 2019
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Ntasios, Angelos (author)The last years, there has been a increasing trend in embedded system and FPGA im-plementations for greater flexibility and also, a rising adaptation of heterogeneous plat-forms. These platforms often include FPGAs and embedded cores side by side.ρ-VEXcore, developed and maintained by the Computer Engineering group of TU Delft, is aVLIW processor...master thesis 2019
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Sigurbergsson, Bjorn (author)The trend of computing faster and more efficiently has been a driver for the computing industry since its beginning. However, it is increasingly difficult to continue this trend because current CMOS technology cannot be down-scaled anymore due to physical restrictions. Consequently, to obtain the next major performance improvement, the focus is...master thesis 2018
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Hesam, Ahmad (author)Life scientists are faced with the tough challenge of developing high-performance computer simulations of their increasingly complex models. BioDynaMo is an open-source biological simulation platform that aims to alleviate them from the intricacies that go into development. Life scientists are able to base their models on top of BioDynaMo’s...master thesis 2018
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Hilmarsson, Saevar (author)Image processing is found in many fields and in many domains. Advances in<br/>digital image capturing technology allows for faster video rates, of higher quality, than has been seen before and that trend continues. With greater resolution and increased data flow there is also a need for faster and better hardware for image processing. As the...master thesis 2018
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Qiao, Yang (author)New interfaces to interconnect CPUs and accelerators at memory-class bandwidth pose new opportunities and challenges for the design of accelerators. This thesis studies one such accelerator, a decompressor for Parquet files compressed with the Snappy library. Our design targets reconfigurable logic (FPGAs) attached via the open coherent...master thesis 2018
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Zeng, Xianwei (author)As database systems have shifted from disk-based to in-memory, and the scale of the database in big data analysis increases significantly, the workloads analyzing huge datasets are growing. Adopting FPGAs as hardware accelerators improves the flexibility, parallelism and power consumption versus CPU-only systems. The accelerators are also...master thesis 2018
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Mulder, Y.T.B. (author)A new class of accelerator interfaces has signi cant implications on system architecture. An order of magnitude more bandwidth forces us to reconsider FPGA design. OpenCAPI is a new interconnect standard that enables attaching FPGAs coherently to a high-bandwidth, low- latency interface. Keeping up with this bandwidth poses new challenges for...master thesis 2018
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Joshi, Ayush (author)Partial Discharges(PD) are commonly produced in defects within the insulation systems of high voltage equipment. These discharges are typically nanosecond current pulses in the amplitude range of milli-amperes. A long term exposure of the insulation system to these partial discharges accelerate the aging mechanisms that eventually lead to the...master thesis 2017
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Verhage, A.A. (author)Technolution B.V. is developing a custom Reduced Instruction Set Computer (RISC)-V based softcore for implementation on a Field Programmable Gate Array (FPGA). Previously, the softcore used the memory residing on the FPGA only, which is very limited in capacity and limits scaling. To solve this problem, a connection is made from the softcore to...master thesis 2016
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Yanik, K.I.M. (author)The trend of increasing performance by parallelism is followed by the adoption of heterogeneous systems. In order to allow more fine-tuned balancing between used thread- and instruction level parallelism, the heterogeneous ρ-VEX platform was developed. Pipelining has been a part of microprocessor development for decades to increase throughput of...master thesis 2016
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Heij, R.W. (author)In this work a fast and efficient implementation of a Field Programmable Gate Array (FPGA) based, fixed hardware, streaming multiprocessor architecture for low latency medical image processing is introduced. The design of this computation fabric is based on the ρ-VEX Very Long Instruction Word (VLIW) softcore processor and is in influenced by...master thesis 2016