?-VEX

Abstract

Increasingly more computing power is being demanded in the domain of multimedia applications. Computer architectures based on reconfigurable hardware are becoming more popular now that classical drawbacks are diminishing. FPGA are constantly improving in terms of performance and area, and provide a technology platform that allows fast and complex reconfigurable designs. The MOLEN polymorphic processor provides the possibility of executing an application-specific core in a custom generated hardware unit, which resides inside a reconfigurable fabric. This thesis presents the architectural design and implementation of a reconfigurable and extensible open source VLIW processor: ?-VEX. In addition to architectural extensibility, our processor also supports reconfigurable operations. Furthermore, we present an application development framework to optimally exploit the freedom of reconfigurable operations. Because ?-VEX is based on the VEX ISA, we already have a good compiler which is able to deal with ISA extensibility and reconfigurable operations. Our processor is targeted to be a CCU within a MOLEN reconfigurable computing machine. To estimate the performance gains, we present a performance analysis based on the VEX simulator. Results of benchmarks on real hardware show that different configurations of our processor in a stand-alone environment lead to considerable cycle count reductions for a selected benchmark application. 1-, 2-, and 4-issue ?-VEX configurations were synthesized and implemented in real hardware to operate at a maximum clock frequency of 89 MHz.