A High Input Impedance Readout Integrated Circuit based on Continuous-Time Sigma-Delta Modulator with FIR DAC Feedback

Master thesis (2022)

Authors

J. YU Electrical Engineering, Mathematics and Computer Science

Contributors

S. Nihtianova Electronic Instrumentation - EEMCS (mentor)
Hui Jiang Silicon Integrated B.V. (mentor)
C. Gao Electronics - EEMCS (graduation committee member)
Faculty
Electrical Engineering, Mathematics and Computer Science, Electrical Engineering, Mathematics and Computer Science
Copyright: © 2022 Jinqian YU
More Info
expand_more

Published Date

28-09-2022

Language

English

Reuse Rights

Other than for strictly personal use, it is not permitted to download, forward or distribute the text or part of it, without the consent of the author(s) and/or copyright holder(s), unless the work is under an open content license such as Creative Commons.

Faculty

Electrical Engineering, Mathematics and Computer Science

Abstract

This thesis focuses on the design of a high input impedance sensor readout system based on a continuous-time sigma-delta modulator with finite-impulse-response digital-to-analog converter feedback.

Both the system-level and circuit-level design techniques of this system are investigated. The concept and design methods of finite-impulse-response digital-to-analog converters are introduced. The first integrator with source degeneration resistors and an input Gm-boosting cell is designed to achieve high input impedance and linearity. Both simulation and post-layout simulation results confirm the expected effective number of bits of 15 bits in the readout performance. The design is fabricated in a standard 180nm CMOS technology.

Files

A_High_Input_Impedance_Readout... (.pdf)
(.pdf | 8.45 Mb)
- Embargo expired in 28-09-2023