Operating system support for a dynamically reconfigurable VLIW processor

Master thesis (2018)

Authors

A. Kulkarni Electrical Engineering, Mathematics and Computer Science

Contributors

J.S.S.M. Wong (mentor)
Faculty
Electrical Engineering, Mathematics and Computer Science, Electrical Engineering, Mathematics and Computer Science
Copyright: © 2018 Anurag Kulkarni
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Published Date

20-11-2018

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Abstract

The ρ-VEX is a dynamically reconfigurable VLIW processor, developed at TU Delft, which is capable of extracting large amounts of parallelism from applications running on it. However, without a dedicated software layer to dictate the reconfigurations, the ρ-VEX has to depend on another processor to carry out its reconfigurations meaningfully. Otherwise, this task can be left to the applications themselves, which would increase their complexity. In order to make the ρ-VEX capable of behaving as a stand-alone processor, with complex real-world applications running on it benefiting from its dynamic properties, while remaining abstract from the hardware changes, such a dedicated piece of software is needed. An operating system can equip the ρ-VEX with such functionality, as well as with other desired features like memory management support. Running applications in virtual memory is an important step towards multitasking. Therefore, the envisioned goal of this project is to make the ρ-VEX processor a truly independent and dynamic environment, capable of extracting large amounts of thread-level as well as instruction-
level parallelism from programs running on it.
In this project, the Linux kernel 2.6.32 has been ported on simrvex: a cycle-accurate
architectural simulator for the ρ-VEX processor. To test the port, three benchmarks from the Powerstone benchmark suite, crc, ucbqsort and jpeg, have been chosen to run as user programs on the ported Linux kernel. The timing performance of these benchmarks for the 2-issue, 4-issue and 8-issue configurations of the ρ-VEX is also presented.