A CMOS Temperature Compensated Log-Amp Detector

Master thesis (2013)

Authors

Contributors

W.A. Serdijn (mentor)
Programme
Electronics (EEMCS) (TU Delft)
Copyright: © 2013 Muijs, E.S.
RF Analog CMOS IC Temperature compensation Detector Log-amp
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Published Date

30-05-2013

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Programme

Electronics

Abstract

Publications of bipolar log-amp detectors for RF power detection show good temperature and RF performance. So far published CMOS log-amps fail to demonstrate accurate performance over temperature. This thesis present a temperature compensated CMOS RF power detector based on the log-amp architecture with an industry temperature range of -40 C to 84 C. Up to 900 MHz the temperature drift is never larger than +/-1.1 dB for all 24 measured samples over the temperature range. The prototyped IC has an active area of 0.76mm^2 and draws 6.3mA from a 1.8V power supply. Simulations of newer CMOS technologies show that this IC would compete in all important specifications for 65 nm technology. A new temperature compensation scheme was invented. In simulations the temperature drift for RF input signals up to 900 MHz is limited to 0.8 dB.