Ultra Low-Power Analog Integrated Circuits for Extracellular Action Potential Detection

Abstract

An action potential or spike detector is an important part of neural recording implants. The detector performs on-chip data reduction by trying to capture only relevant information (real occurrences of the action potential) from the recorded signals. This data selection is indispensable since it helps reducing data rate as well as operating power for wireless data transmission of the neural sensor. This thesis explores the possibility of improving detections and reducing power consumption of neural spike detectors. As a result, two designs are presented in this thesis. First, the dynamic translinear realization of the nonlinear second-order differential equation describing the nonlinear energy operator performing the real time energy detection of analog signals is presented. The spikes are isolated from the background noise as the energy of the spikes is considered to be different from the background noise. The quiescent power consumption equals 7.2 mW. The expected behavior of the designed nonlinear energy operator is demonstrated by means of simulations. In addition, an ultra low-power CMOS analog circuit for detection of APs embedded in noisy signals is presented. The proposed strategy isolates APs by detecting subsequently a positive and a negative spike of each AP. An AP is detected only if the positive spike is detected within a short period of time after the negative spike was detected. The final circuit operates from a 1-V supply and consumes only 1.5 nA. The detector is verified by means of simulations with synthetic neural waveforms and is able to successfully detect APs in noisy signals. In addition, the 1.5 nW power dissipation is by far the smallest among action potential detectors reported in the literature.