Varactor element and low distortion varactor circuit arrangement

Patent (2007)
Faculty
Electrical Engineering, Mathematics and Computer Science (EEMCS) (TU Delft)
Copyright: © 2007 De Vreede, L.C.N.
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Published Date

31-05-2007

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Source:

WO 2007061308 (A1)

Source:

http://v3.espacenet.com/publicationDetails/biblio?adjacent=true&locale=en_EP&FT=D&date=20070531&CC=WO&NR=2007061308A1&KC=A1

Faculty

Electrical Engineering, Mathematics and Computer Science

Abstract

Varactor element (Dl; D2) having a junction region, in which the depletion capacitance of the varactor element varies when a reverse bias voltage is applied to the varactor element. The varactor element (Dl; D2) has an exponential depletion capacitance- voltage relation, e.g. obtained by providing a predetermined doping profile in the junction region. The varactor element (Dl; D2) can be used in a narrow tone spacing varactor stack arrangement, in which two varactor elements (Dl; D2) are connected in an anti-series configuration. A low impedance path for base band frequency components between a control node and each of two RF connection nodes is provided, while for fundamental and higher order harmonic frequencies, a high impedance path is provided.