Roadmap for unconventional computing with nanotechnology

In the ‘Beyond Moore’s Law’ era, with increasing edge intelligence, domain-specific computing embracing unconventional approaches will become increasingly prevalent. At the same time, adopting a variety of nanotechnologies will offer benefits in energy cost, computational speed, reduced footprint, cyber resilience, and processing power. The...

On BTI Aging Rejuvenation in Memory Address Decoders

Memory designs require timing margins to compensate for aging and fabrication process variations. With technology downscaling, aging mechanisms became more apparent, and larger margins are considered necessary. This, in return, means a larger area requirement and lower performance for the memory. Bias Temperature Instability (BTI) is one of the...

Software-Based Mitigation for Memory Address Decoder Aging

Integrated circuits typically contain design margins to compensate for aging. As aging impact increases with technology scaling, bigger margins are necessary to achieve the desired reliability. However, these increased margins lead to a reduced performance and lower yield. Alternatively, mitigation schemes can be deployed to reduce the aging....

Wirelessly Powered Non-Volatile Memory

Content creation and content sharing have become part of our daily lives. With modern electronics, creating and sharing content has become very convenient, but this convenience has come at a price. Devices like smartphones that enable us to easily share content, are costly and complex. Devices like USB flash drives, on the other hand, are low...

Compile time aanalysis for hardware transactional memory architectures

Transactional Memory is a parallel programming paradigm in which tasks are executed, in forms of transactions, concurrently by different resources in a system and resolve conflicts between them at run-time. Conflicts, caused by data dependencies, result in aborts and restarts of transactions, thus, degrading the performance of the system. In...

Hierarchical Memory Diagnosis Approach

Semiconductor memories are an inherent part of many modern electronic systems. Due to the fast development of memory process technology and the escalating computing speeds, the on-chip share of memories is rapidly increasing. Additionally, the quality and reliability requirements are becoming more severe especially for critical applications such...

Generic and Orthogonal March Element based Memory BIST Engine

A Memory BIST architecture and implementation based on the novel concept of Generic and Orthogonal March Element