Searched for: subject%3A%22FPGA%22
(1 - 2 of 2)
document
Procaccini, Marco (author), Sahebi, Amin (author), Barbone, Marco (author), Luk, Wayne (author), Gaydadjiev, G. (author), Giorgi, Roberto (author)
Processing graphs on a large scale presents a range of difficulties, including irregular memory access patterns, device memory limitations, and the need for effective partitioning in distributed systems, all of which can lead to performance problems on traditional architectures such as CPUs and GPUs. To address these challenges, recent...
conference paper 2024
document
Sahebi, Amin (author), Barbone, Marco (author), Procaccini, Marco (author), Luk, Wayne (author), Gaydadjiev, G. (author), Giorgi, Roberto (author)
Processing large-scale graphs is challenging due to the nature of the computation that causes irregular memory access patterns. Managing such irregular accesses may cause significant performance degradation on both CPUs and GPUs. Thus, recent research trends propose graph processing acceleration with Field-Programmable Gate Arrays (FPGA)....
journal article 2023