Searched for: subject%3A%22Multi%255C-core%22
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Bandic, M. (author), Prielinger, L.P. (author), Nublein, Jonas (author), Ovide, Anabel (author), Rodrigo, Santiago (author), van Someren, J. (author), Vardoyan, G.S. (author), Almudever, Carmen G. (author), Feld, S. (author)
Modular quantum computing architectures are a promising alternative to monolithic QPU (Quantum Processing Unit) designs for scaling up quantum devices. They refer to a set of interconnected QPUs or cores consisting of tightly coupled quantum bits that can communicate via quantum-coherent and classical links. In multi-core architectures, it is...
conference paper 2023
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Ovide, Anabel (author), Rodrigo, Santiago (author), Bandic, M. (author), van Someren, J. (author), Feld, S. (author), Abadal, Sergi (author), Alarcon, Eduard (author), Almudever, Carmen G. (author)
Current monolithic quantum computer architectures have limited scalability. One promising approach for scaling them up is to use a modular or multi-core architecture, in which different quantum processors (cores) are connected via quantum and classical links. This new architectural design poses new challenges such as the expensive inter-core...
conference paper 2023
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Marcè Igual, Joan (author)
Gang scheduling, has long been adopted by the high-performance computing community as a way to reduce the synchronization overhead between related threads. Gang schedulling allows for several threads to execute in lock steps without suffering from long busy-wait periods or be penalised by large context-switch overheads. If several threads use...
master thesis 2020
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Noordam, Leon (author)
Modular exponentiation is the basis needed to perform RSA encryption and decryption. Execution of 4096-bit modular exponentiation using an embedded system requires many arithmetic operations. This work aims to improve the performance of modular exponentiation for an existing FPGA platform containing a soft core RISC-V processor. The solution is...
master thesis 2019
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Brouwer, Daniël (author)
Mechatronic embedded control systems are becoming increasingly sophisticated and computationally demanding. These systems typically consists of multiple controllers, which coordinate the actuators and apply feedback based on data collected by sensors. Often the underlying control strategy is entirely described in a software application, which...
master thesis 2018
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Stokkink, Q.A. (author)
There are two key components for high throughput distributed anonymizing applications. The first key component is overhead due to message complexity of the utilized algorithms. The second key component is an nonscalable architecture to deal with this high throughput. These issues are compounded by the need for anonymization. Using a state of the...
master thesis 2017
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Shen, J. (author)
Heterogeneous platforms are mixes of different processing units in a compute node (e.g., CPUs+GPUs, CPU+MICs) or a chip package (e.g., APUs). This type of platforms keeps gaining popularity in various computer systems ranging from supercomputers to mobile devices. In this context, improving their efficiency and usability has become increasingly...
doctoral thesis 2015
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Narayana, S. (author)
Embedded systems are getting into various domains of our daily life as well as in many of the highly sophisticated large systems, such as air planes, military tanks, rockets, satellites. These large systems consist of many modules which are executing umpteen number of tasks semi-independently. However, not all tasks have the same levels of...
master thesis 2015
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Ahmadi Mehr, S.A.R. (author), Tohidian, M. (author), Staszeski, R.B. (author)
In modern RF system on chips (SoCs), the digital content consumes up to 85% of the IC chip area. The recent push to integrate multiple RF-SoC cores is met with heavy resistance by the remaining RF/analog circuitry, which creates numerous strong aggressors and weak victims leading to RF performance degradation. A key such mechanism is injection...
journal article 2015
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Madan, R. (author)
ASML is one of the world's largest suppliers of lithography systems for the semiconductor industry. ASML designs and develops machines that are used to print circuits on silicon wafers, to produce IC chips. These circuits have to be printed with accuracy of up to 2nm. For this purpose, the machines incorporate several measurement systems. The...
master thesis 2013
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Smaragdos, G. (author)
Recent trends in transistor technology have dictated the constant reduction of device size. One negative effect stemming from the reduction in size and increased complexity is reduced reliability. This thesis is centered around the matter of fault recovery, in the subject of device fault-tolerance, and graceful system degradation in the presence...
master thesis 2012
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Amarnath, R. (author)
The demand to increase performance while conserving power has led to the invention of multi-core systems. The software until now had the convenience of gaining better performance over faster processors without any need for a change. The advances in the multi-core hardware have shifted the responsibility of software performance from hardware...
master thesis 2012
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Roostaie, V. (author)
Cache coherence and memory consistency are of the most decisive and challenging issues in the design of shared-memory multi-core systems that influence both the correctness and performance of parallel programs. In this thesis, we identify and analyze the problem of designing a coherent/consistent memory subsystem in general and then focus on...
master thesis 2011
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Theodoropoulos, D.N. (author)
In this dissertation, we propose a new approach for rapid development of multi-core immersive-audio systems. We study two popular immersive-audio techniques, namely the Beamforming and the Wave Field Synthesis (WFS). Beamforming utilizes microphone arrays to extract acoustic sources recorded in a noisy environment. WFS employs large loudspeaker...
doctoral thesis 2011
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Van Kampenhout, J.R. (author)
In this thesis we consider the application of multi-cores in safety critical real-time systems, especially avionics. In our literature study we extract two major challenges. Firstly the unpredictability that comes from the concurrent access of shared resources (especially the on-chip interconnect) must be dealt with. To address this we propose...
master thesis 2011
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Sabeghi, M. (author)
Multi-core processing platforms are one of the major steps forward in offering high-performance computing platforms. The idea is to increase the performance by employing more processing elements to perform a job. However, this creates a challenge for both hardware developers who build such systems and software designers who program those...
doctoral thesis 2011
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Varbanescu, A.L. (author)
Multi-core processors are considered now the only feasible alternative to the large single-core processors which have become limited by technological aspects such as power consumption and heat dissipation. However, due to their inherent parallel structure and their diversity, multi-cores are difficult to program. There is a variety of different...
doctoral thesis 2010
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Al Umairy, S.A.H. (author)
This thesis is done in the framework of wafer metrology to accelerate an electromagnetic diffraction model (EDM), which is used to measure the profile on a wafer, on programmable graphics processors (GPU). The main focus of this thesis is to investigate the suitability of EDM to GPU architectures. This study contributes with statistical data and...
master thesis 2010
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Van Rijk, E. (author)
With the rise of multi-core chips in commodity hardware, the need for specialized workloads to evaluate the performance of multi-core systems has become apparent. The current generation of workloads used for evaluating multi-core systems often consist of sequential programs not capable of running on multiple processors and are therefore of...
master thesis 2009
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Varbanescu, A.L. (author), Sips, H. (author), Ross, K.A. (author), Liu, Q. (author), Liu, L.K. (author), Natsev, A. (author), Smith, J.R. (author)
In this paper we present a solution for efficient porting of sequential C++ applications on the Cell B.E. processor. We present our step-by-step approach, focusing on its generality, we provide a set of code templates and optimization guidelines to support the porting, and we include a set of equations to estimate the performance gain of the new...
conference paper 2007
Searched for: subject%3A%22Multi%255C-core%22
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