A Fully Integrated Discrete-Time Superheterodyne Receiver

The zero/low intermediate frequency (IF) receiver (RX) architecture has enabled full CMOS integration. As the technology scales and wireless standards become ever more challenging, the issues related to time-varying dc offsets, the second-order nonlinearity, and flicker noise become more critical. In this paper, we propose a new architecture of...

Fully Integrated Discrete-Time Superheterodyne Receiver in Nano-Scale CMOS

In a radio-frequency (RF) system-on-chip (SoC), a digital baseband/application processor, which occupies most of the silicon area, determines the SoC fabrication process technology and voltage supply. The rest of the circuitry, including RF front-end and frequency synthesizer, must then adopt the chosen process technology, i.e., presently low...