Addition related arithmetic operations with threshold logic

CORDIC for High Performance Numerical Computation

Multimedia Hardware Accelerators

The Delft-Java Engine

In this dissertation, we describe the DELFT-JAVA engine - a 32-bit RISC-based architecture that provides high performance JAVA program execution. More specifically we describe a microarchitecture that accelerates JAVA execution and provide details of the DELFT-JAVA architecture for executing JAVA Virtual Machine bytecode. The basic architecture...

Arithmetic soft-core accelerators

In this dissertation, we address the design of multi-functional arithmetic units working with the most common fixed-point number representations, namely: unsigned, sign-magnitude, fractional, ten's and two's complement notations. The main design goal is to collapse multiple complex arithmetic operations into a single, universal arithmetic unit,...

Exploring suitable Adder Designs for Biomedical Implants: A gracefully-degradable, fault-tolerant, and highly resource-constrained adder for SiMS

Modern applications demand extremely low power budgets in computer architectures for battery-operated devices. In the particular case of implantable devices —the main focus of this thesis— the system must have a long life span and batteries may not be possible or easy to recharge. In addition to power, chip area is also of major concern in this...

Hardware Algorithms For Tile-Based Real-Time Rendering

In this dissertation, we present the GRAphics AcceLerator (GRAAL) framework for developing embedded tile-based rasterization hardware for mobile devices, meant to accelerate real-time 3-D graphics (OpenGL compliant) applications. The goal of the framework is a low-cost, low-power, high-performance design that delivers good image quality. We...

The properties of negation and zero in ringoids as defined by Kulisch

In [1,2] Kulisch defines (ordered) ringoids and vectoids to provide a theoretical basis for computer arithmetic and interval arithmetic. One interesting aspect of his treatment is the search for necessary and sufficient conditions for a meaningful notion of negation and zero. In this paper we consider this both from the point of view of...

Complement-based Stochastic Computing Multiplier Design for Convolutional Neural Network Acceleration

Recently, it has become popular to use Convolutional Neural Networks (CNNs) in embedded and portable devices. The popularity is based on their high accuracy rate in the field of Computer Vision (CV). However, CNNs are computationally intensive due to the convolutional layer, which accounts for over 90% of the operations. To overcome this problem...

An Area and Energy Efficient Arithmetic Unit for Stacked Machine Learning Models: Mo Model Mo Problems Like... Hardware Design Problems

Machine learning on edge devices performs crucial identification or prediction tasks while limiting the amount of data that needs to be transmitted to more centralized computing nodes. However, strict area and energy requirements necessitate specialized hardware developed for the requirements of the device and model. This thesis is concerned...