Searched for: subject%3A%22continuation%22
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Javvaji, L.S. (author), Bolatkale, M. (author), Bajoria, Shagun (author), Rutten, Robert (author), Essink, Bert Oude (author), Beijens, Koen (author), Makinwa, K.A.A. (author), Breems, L.J. (author)
Advances in CMOS technologies and circuit techniques have led to the development of continuous-time delta-sigma modulators (CTΔ Σ Ms) that sample at gigahertz (GHz) frequencies and achieve high linearity [-100 dBc and >120 dBFS spurious-free dynamic ranges (SFDRs)] in wide bandwidths (>100 MHz). However, at low frequencies (≤ 10 MHz),...
journal article 2024
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Mehrotra, Shubham (author), Eland, Efraim (author), Karmakar, S. (author), Liu, Angqi (author), Gonen, B. (author), Bolatkale, M. (author), Van Veldhoven, Robert (author), Makinwa, K.A.A. (author)
This paper presents a continuous-Time zoom ADC for audio applications. It combines a 4-bit noise-shaping coarse SAR ADC and a fine delta-sigma modulator with a tail-resistor linearized OTA for improved linearity, energy efficiency, and handling of out-of-band interferers compared to previous designs. In 160 nm CMOS, the prototype chip...
conference paper 2022
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Bolatkale, M. (author), Breems, LJ (author), Rutten, Robert (author), Makinwa, K.A.A. (author)
A 4 GHz third-order continuous-time ΔΣ ADC is presented with a loop filter topology that absorbs the pole caused by the input capacitance of its 4-bit quantizer and also compensates for the excess delay caused by the quantizer's latency. The ADC was implemented in 45 nm-LP CMOS and achieves 70 dB DR and -74 dBFS THD in a 125 MHz BW, while...
journal article 2011