An Asynchronous Pipelined Time-to-Digital Converter Using Time-Domain Subtraction

This paper presents the design of a low-power asynchronous pipelined time-to-digital converter (AP-TDC) to be employed in a time-domain signal processing system. The presented AP-TDC utilizes two novel concepts, namely time-domain subtraction and absolute value based algorithmic conversion. The design and <br/>simulation of the AP-TDC is done...

A 10-bit, 771 nW Time-Mode ADC with a 2-Step TDC for Bio-Signal Acquisition

In this paper, we present the design of a low-voltage, low-power, and small-area time-mode ADC (TM-ADC) for bio-signal sensing applications. The proposed time-mode ADC (TM-ADC) consists of a programmable oversampling ratio (OSR), voltage-controlled ring oscillator (VCRO) based analog-to-time converter (ATC), followed by an asynchronous unfolded...