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Bolatkale, M. (author), Breems, LJ (author), Rutten, Robert (author), Makinwa, K.A.A. (author)A 4 GHz third-order continuous-time ΔΣ ADC is presented with a loop filter topology that absorbs the pole caused by the input capacitance of its 4-bit quantizer and also compensates for the excess delay caused by the quantizer's latency. The ADC was implemented in 45 nm-LP CMOS and achieves 70 dB DR and -74 dBFS THD in a 125 MHz BW, while...journal article 2011
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Chae, Y. (author), Souri, K. (author), Makinwa, K.A.A. (author)A 20-bit incremental ADC for battery-powered sensor applications is presented. It is based on an energy-efficient zoom ADC architecture, which employs a coarse 6-bit SAR conversion followed by a fine 15-bit ΔΣ conversion. To further improve its energy efficiency, the ADC employs integrators based on cascoded dynamic inverters for extra gain and...journal article 2013
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Aita, AL (author), Pertijs, M.A.P. (author), Makinwa, K.A.A. (author), Huijsing, J.H. (author), Meijer, G.C.M. (author)In this paper, a low-power CMOS smart temperature sensor is presented. The temperature information extracted using substrate PNP transistors is digitized with a resolution of 0.03 °C using a precision switched-capacitor (SC) incremental<br/> A/D converter. After batch calibration, an inaccuracy of ±0.25 °C (±3σ ) from −70 °C to 130 °C is...journal article 2013
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Akter, S. (author), Sehgal, R.K. (author), van der Goes, Frank (author), Makinwa, K.A.A. (author), Bult, K. (author)This paper presents a closed-loop class-AB residue amplifier for pipelined analog-to-digital converters (ADCs). It consists of a push-pull structure with a ``split-capacitor'' biasing circuit that enhances its power efficiency. The amplifier is inherently quite linear, and so incomplete settling can be used to save power while still...journal article 2018
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Karmakar, S. (author), Gonen, B. (author), Sebastiano, F. (author), van Veldhoven, Robert (author), Makinwa, K.A.A. (author)This paper presents a dynamic zoom analog-to-digital converter for use in low-bandwidth (&lt;1 kHz) instrumentation applications. It employs a high-speed asynchronous successive approximation register (SAR) ADC that dynamically updates the references of a fully differential &#x0394; &#x03A3; ADC. Compared to previous zoom ADCs,...journal article 2018
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Gonen, B. (author), Karmakar, S. (author), van Veldhoven, Robert (author), Makinwa, K.A.A. (author)This article presents a continuous-Time zoom analog to digital converter (ADC) for audio applications. It employs a high-speed asynchronous SAR ADC that dynamically updates the references of a continuous-Time delta-sigma modulator (CTDSM). Compared to previous switched-capacitor (SC) zoom ADCs, its input impedance is essentially resistive,...journal article 2020
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Eland, E.N. (author), Karmakar, S. (author), Gonen, B. (author), van Veldhoven, Robert (author), Makinwa, K.A.A. (author)This article describes a discrete-time zoom analog-to-digital converter (ADC) intended for audio applications. It uses a coarse 5-bit SAR ADC in tandem with a fine third-order delta-sigma modulator (ΔΣM) to efficiently obtain a high dynamic range. To minimize its over-sampling ratio (OSR) and, thus, its digital power consumption, the...journal article 2021
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Mehrotra, Shubham (author), Eland, Efraim (author), Karmakar, S. (author), Liu, Angqi (author), Gonen, B. (author), Bolatkale, M. (author), Van Veldhoven, Robert (author), Makinwa, K.A.A. (author)This paper presents a continuous-Time zoom ADC for audio applications. It combines a 4-bit noise-shaping coarse SAR ADC and a fine delta-sigma modulator with a tail-resistor linearized OTA for improved linearity, energy efficiency, and handling of out-of-band interferers compared to previous designs. In 160 nm CMOS, the prototype chip...conference paper 2022