Test and Diagnosis of Hard-to-Detect Faults in FinFET SRAMs

The Fin Field-Effect Transistor (FinFET) technology became the most promising approach to enable the downscaling of technological nodes below the 20 nm threshold. However, the introduction of new technology nodes for embedded memories such as SRAMs, especially for even smaller nodes such as 10 and 5 nm, gives rise to new manufacturing failure...

Evaluation of Single Event Upset Susceptibility of FinFET-based SRAMs with Weak Resistive Defects

Fin Field-Effect Transistor (FinFET) technology enables the continuous downscaling of Integrated Circuits (ICs), using the Complementary Metal-Oxide Semiconductor (CMOS) technology in accordance with the More Moore domain. Despite demonstrating improvements on short channel effect and overcoming the growing leakage problem of planar CMOS...

Evaluating the Impact of Ionizing Particles on FinFET -based SRAMs with Weak Resistive Defects

Fin Field-Effect Transistor (FinFET) technology enables the continuous downscaling of Integrated Circuits (ICs), using the Complementary Metal-Oxide Semiconductor (CMOS) technology in accordance with the More Moore domain. Despite demonstrating improvements on short channel effect and overcoming the growing leakage problem of planar CMOS...

A DFT Scheme to Improve Coverage of Hard-to-Detect Faults in FinFET SRAMs

Manufacturing defects can cause faults in FinFET SRAMs. Of them, easy-to-detect (ETD) faults always cause incorrect behavior, and therefore are easily detected by applying sequences of write and read operations. However, hard-to-detect (HTD) faults may not cause incorrect behavior, only parametric deviations. Detection of these faults is of...