We present a design that implements digitization of an analog SiPM's fast output on chip to pave the way to higher granularity in the digital conversion of photon detection. The design comprises a comparator bank, time-to-digital converters (TDCs), and electronics for interfacing with the external world. The TDC is a multipath, gated ring oscillator with a counter and phase detector, implemented in 0.35μm CMOS technology. Simulation results indicate a DNL of ±0.55LSB and an INL of ±1LSB, a large, adjustable range, and a typical resolution of 65ps (LSB).