This thesis describes the design and measurement of an IC which can digitize both capacitance and temperature. Capacitance sensing functionality is added to an existing Temperature to Digital Converter (TDC) without adding significant die area. Two kinds of baseline capacitance compensation techniques have been investigated and their performance has been simulated at the system level. While adding capacitance sensing functionality to the TDC, the capacitive DAC and sigma-delta zoom ADC of the existing design have been reused. Dynamic element matching has been applied to ensure that mismatch in the capacitive DAC will not give rise to discontinuities between the sub-ranges of the ADC. Measurements show that the chip is functional and achieves the targeted capacitance-sensing resolution at a FOM of 1.87pJ/step.