Typically in synchronous digital systems time-based tasks are synchronized using hard-wired clock distribution networks. However in the growing application of large (wireless) sensor networks it is not always feasible to connect each sensor node to a hard-wired clock distribution network. Generally in such systems the sensor nodes are only connected via a (wireless) communication network, hence there have been implementations where clocks are synchronized via the network nodes, in general these solutions synchronize the network nodes in the range of milliseconds up to microseconds. Though some applications, like SPADnet, demand a network based clock synchronization in the range of picoseconds. Currently the SPADnet system is equipped with a hard-wired clock distribution network, this clock network does not scale well. Since one of the goals of SPADnet is to create a scalable system, a network based clock synchronization solution is a better alternative. In this thesis a hybrid solution is presented, where a hard-wired clock synchronization network is combined with a network based clock offset estimator. This combination enables scalability while maintaining high precision. A novel least squares synchronization algorithm is optimized and implemented in hardware equipped with a delayline FPGA TDC, allowing picosecond clock synchronization.