The long-term stability of polymer-encapsulated CMOS integrated circuits (ICs) is essential for mm-size active implantable medical devices (AIMDs), where hermetic packaging is impractical. Validating robust, biocompatible, implantable IC encapsulation is a prerequisite for chip-scale polymeric bioelectronic implants. This study presents the first long-term validation of a design strategy combining medical-grade silicone, plasma surface treatment for adhesion, and foundry-manufactured CMOS ICs. These ICs feature a perforated shield layer (top metal layer) and a double-layer wall-of-vias to reduce moisture ingress and mechanical delamination. Test structures with silicon oxide/nitride passivation were encapsulated using implant-compatible processes and immersed in saline under accelerated ageing conditions (47 °C, 67 °C, and 87 °C) for up to 4.3 years, under DC and biphasic biases. Throughout the study, electrochemical impedance spectroscopy (EIS) showed no insulation failures. Minor visual corrosion was confined to wire bonds and solder pads, with no correlation to electrical degradation. These results demonstrate the robustness to biofluid exposure of modern IC passivation when combined with well-adhered silicone encapsulation. To our knowledge, this is the longest and most comprehensive accelerated ageing study of its kind, and the first to establish a scalable, industry-compatible encapsulation method for implanted ICs. Our findings provide critical evidence supporting the integration of CMOS ICs into next-generation bioelectronic implants.

Objective. Ensuring the longevity of implantable devices is critical for their clinical usefulness. This is commonly achieved by hermetically sealing the sensitive electronics in a water impermeable housing, however, this method limits miniaturisation. Alternatively, silicone encapsulation has demonstrated long-term protection of implanted thick-film electronic devices. However, much of the current conformal packaging research is focused on more rigid coatings, such as parylene, liquid crystal polymers and novel inorganic layers. Here, we consider the potential of silicone to protect implants using thin-film technology with features 33 times smaller than thick-film counterparts. Approach. Aluminium interdigitated comb structures under plasma-enhanced chemical vapour deposited passivation (SiO x , SiO x N y , SiO x N y + SiC) were encapsulated in medical grade silicones, with a total of six passivation/silicone combinations. Samples were aged in phosphate-buffered saline at 67 °C for up to 694 days under a continuous 5 V biphasic waveform. Periodic electrochemical impedance spectroscopy measurements monitored for leakage currents and degradation of the metal traces. Fourier-transform infrared spectroscopy, x-ray photoelectron spectroscopy, focused-ion-beam and scanning-electron- microscopy were employed to determine any encapsulation material changes. Main results. No silicone delamination, passivation dissolution, or metal corrosion was observed during ageing. Impedances greater than 100 GΩ were maintained between the aluminium tracks for silicone encapsulation over SiO x N y and SiC passivations. For these samples the only observed failure mode was open-circuit wire bonds. In contrast, progressive hydration of the SiO x caused its resistance to decrease by an order of magnitude. Significance. These results demonstrate silicone encapsulation offers excellent protection to thin-film conducting tracks when combined with appropriate inorganic thin films. This conclusion corresponds to previous reliability studies of silicone encapsulation in aqueous environments, but with a larger sample size. Therefore, we believe silicone encapsulation to be a realistic means of providing long-term protection for the circuits of implanted electronic medical devices.

Objective. Ensuring the longevity of implantable devices is critical for their clinical usefulness. This is commonly achieved by hermetically sealing the sensitive electronics in a water impermeable housing, however, this method limits miniaturisation. Alternatively, silicone encapsulation has demonstrated long-term protection of implanted thick-film electronic devices. However, much of the current conformal packaging research is focused on more rigid coatings, such as parylene, liquid crystal polymers and novel inorganic layers. Here, we consider the potential of silicone to protect implants using thin-film technology with features 33 times smaller than thick-film counterparts. Approach. Aluminium interdigitated comb structures under plasma-enhanced chemical vapour deposited passivation (SiOx, SiOxNy, SiOxNy + SiC) were encapsulated in medical grade silicones, with a total of six passivation/silicone combinations. Samples were aged in phosphate-buffered saline at 67 ∘C for up to 694 days under a continuous ±5 V biphasic waveform. Periodic electrochemical impedance spectroscopy measurements monitored for leakage currents and degradation of the metal traces. Fourier-transform infrared spectroscopy, x-ray photoelectron spectroscopy, focused-ion-beam and scanning-electron- microscopy were employed to determine any encapsulation material changes. Main results. No silicone delamination, passivation dissolution, or metal corrosion was observed during ageing. Impedances greater than 100 GΩ were maintained between the aluminium tracks for silicone encapsulation over SiOxNy and SiC passivations. For these samples the only observed failure mode was open-circuit wire bonds. In contrast, progressive hydration of the SiOx caused its resistance to decrease by an order of magnitude. Significance. These results demonstrate silicone encapsulation offers excellent protection to thin-film conducting tracks when combined with appropriate inorganic thin films. This conclusion corresponds to previous reliability studies of silicone encapsulation in aqueous environments, but with a larger sample size. Therefore, we believe silicone encapsulation to be a realistic means of providing long-term protection for the circuits of implanted electronic medical devices.

We are developing an active implant for epidural spinal cord stimulation. A thin application specific integrated circuit (ASIC) (~80 μm) is to be embedded within it. The laser patterned tracks are electrically and mechanically thermosonically bonded on the ASIC pads using gold ball studs, forming micro-rivets through holes in the foil of the tracks, an interconnection method called electrical rivet bonding, or microflex [1]. In this work, we sought to characterize and optimize the technique, with respect to its bonding strength. The technique is relatively new and, so far, the mechanical strength of the bonds has only been investigated for interconnection on gold tracks. Standard ASICs however, normally come with aluminium pads. We ran a series of pull tests on the bonds between the metal tracks and aluminium ASIC pads. In these tests, we were concerned with the effect of the different parameters on the bond strength, and more specifically the size of the gold balls and the size of the holes in the foil. We recorded the maximum force (stress) before bond failure for different combinations of parameters. Our results indicate that average stress values can vary between 9.6 and 60 cN, depending on the process parameters. Different failure mechanisms have been identified and these are discussed. Overall, we conclude that larger holes provide larger contact areas with the substrate and generally result in stronger bonds, but the right combination of ball and hole sizes, could lead to strong bonds even with smaller holes.

This paper discusses the design of an application-specific integrated circuit (ASIC) suitable for mounting on a multi-electrode array for epidural spinal cord stimulation in rats. The ASIC acts as a demultiplexer, driving 12 electrodes on the array in any configuration. It is capable of routing biphasic constant current pulses of up to 1 mA to high impedance loads (with a maximum output voltage swing of approximately 25 V) and is small enough to be implanted into a rat's spinal column. Communication with its driver is achieved via 3 wires to minimize the number of interconnections. The circuit was implemented in a 0.18-μm high-voltage CMOS technology occupying a core area of 0.36 mm ². Power dissipation is about 110 μW. Post-layout simulations are presented which show the correct operation of the system.