In this research work, efforts have been made to successfully integrate graphene in a standard CMOS fabrication process without the need for wafer-to-wafer transferring. For this purpose, a graphene-based Pirani sensor is integrated in the BICMOS process. Two batches of graphene-based Pirani sensors are characterized, resulting in world’s first operating graphene-based Pirani pressures sensors. The maximum measured resistance change is 2.8 % which is comparable to current state-of-the-art implementations using other materials. The graphene-based implementation allowed for miniaturization of the devices with low power consumption design possibilities.

The BICMOS technology used at EKL at the Delft University of Technology is characterized and effects of graphene growth are investigated. This led to an electrical read-out design in CMOS technology of which the digital circuits
performed as designed. Operational digital logic gates were measured alongside grafeen, but with a reduced yield. The analog circuits proved to be challenging in the BICMOS technology and did therefore not operate as intended. From this it is concluded that it is indeed possible to integrate grafeen with a CMOS process.

Future research work that focuses on the details of the fabrication process flow should result in higher fabrication yields and better reproducibility. Additional measurements on the grafeen structures will help to characterize the graphene-based Pirani better and allow for attempts to fit an analytical model to the measurement data.