A new methodology for Total Ionizing Dose (TID) tests is proposed. It is based on the employment of an on-chip ⁹⁰ Sr/ ⁹⁰ Y beta source as alternative to standard methods such as ⁶⁰ Co gamma rays and electrons from LINAC. The use of a compact beta source for TID tests has several advantages. In particular, the irradiation of devices with more than one radiation source results in a better representation of the complex space radiation environment composed of several types, energies and dose-rates. In addition, the use of an easy handling beta source allows the irradiation of electronic devices without any damage to other auxiliary circuit. In this work, ⁹⁰ Sr/ ⁹⁰ Y beta source dosimetry and related radiation field characteristics are discussed in depth. In order to validate the proposed source for TID tests, a rather complex device such as the “SPC56EL70L5” microcontroller from ST-Microelectronics was exposed to ⁹⁰ Sr/ ⁹⁰ Y beta rays. The results of this test were compared to that of a previous test of another sample from the same lot with a standard gamma ⁶⁰ Co source. The electronic performances following the two irradiations have been found to be in excellent agreement, by demonstrating therefore the validity of the proposed beta source for TID tests.

The use of System-on-Chip (SoC) solutions in the design of on-board data handling systems is an important step towards further miniaturization in space. However, the Total Ionizing Dose (TID) and Single Event Effects (SEE) characterization of these complex devices present new challenges that are either not fully addressed by current testing guidelines or may result in expensive, cumbersome test configurations. In this paper we report the test setups, procedures and results for TID testing of a SoC microcontroller both using standard C60o and low-energy protons beams. This paper specifically points out the differences in the test methodology and in the challenges between TID testing with proton beam and with the conventional gamma ray irradiation. New test setup and procedures are proposed which are capable of emulating typical mission conditions (clock, bias, software, reprogramming, etc.) while keeping the test setup as simple as possible at the same time.