In this research a feasibility study was performed on introducing Zener diodes, junction field-effect transistors (JFETs) and double-diffused MOS transistors (DMOSTs) in an existing silicon 0.25 μm BiCMOS process. As a restriction, no changes to the process were allowed. Lateral polysilicon Zener diodes were designed and optimized for low breakdown voltage and current for the application of One-Time-Programmable (OTP) memory. The selected Zener diode obtained a linear 1 kΩ characteristic by means of a forward biased 10 μs, 8 mA current pulse with 5 V compliance. From cross-sections and (S)TEM images it was concluded that the silicide and cathode dopants migrated into the anode and shorted the junction. Read and write circuitry were successfully designed and implemented into a 405 μm² OTP flipflop. This is only about double the size of a standard flipflop in the used BiCMOS technology.
JFETs and DMOSTs were researched to be used in a high-voltage digital signal driver. A functional NJFET and a functional PJFET were fabricated, but the pinch-off voltages were too high to be used for the target application. Both NDMOS and PDMOS transistor variants were successfully implemented with either 10 nm sacrificial oxide (SOX) or shallow trench isolation (STI) as a thick oxide. The selected STI-based NDMOS (SOX-based PDMOS) transistor for 5 V compliance featured a drain-source breakdown voltage of 10 V (-14 V) and 192 μA/μm (-127 μA/μm) drain saturation current. These devices may be used in a high-voltage digital signal driver, possibly in combination with SOX-based thick-oxide PMOS transistors.