With the increase in voltage level and current capacity of the insulated gate bipolar transistor (IGBT), the avalanche effect has become an important factor limiting the safe operating area (SOA) of the device. The hole injection into the p/n junction on the backside of the IGBT after avalanche is the main feature that distinguishes the avalanche effect from other devices. In this paper, the avalanche breakdown characteristics of IGBT and the nature of current filament are investigated using theoretical analysis and numerical simulation, and the underlying physical mechanism controlling the nature of current filaments is revealed. The results show that the hole injection on the backside of the IGBT leads to an additional negative differential resistance (NDR) branch on the avalanche breakdown curve. The device’s common-base current gain, αpnp, is a crucial factor in determining the current filament. As αpnp increases, the avalanche-induced current filament becomes stronger and slower, resulting in weaker avalanche robustness of the device.@en

To investigate the unclamped inductive switch (UIS) characteristics, 1200 V silicon carbide (SiC) planar MOSFETs with four cell topologies of linear, current sharing linear, square, and hexagon are designed and manufactured. The experimental platform was built and tested. The results show that the single pulse avalanche energy density of the linear cell topology is 1.69 times higher than that of the square and 1.49 times that of the hexagon. Further, the UIS process is simulated by using physical simulation, which shows that the avalanche energy was concentrated near the corner of the P-base region in the UIS mode. From this, the avalanche energy distribution differences of the four cell topologies were analyzed and compared. A theoretical model of avalanche heating per unit area is proposed, which shows that the avalanche energy density is inversely proportional to the proportion of avalanche energy concentration region. This study may contribute to the cell topology design of SiC MOSFETs under the application scenario with high avalanche reliability requirements.@en