Van der Waals heterojunctions (vdWHs) have garnered significant attention for their promising applications in optoelectronics, attributed to their exceptional physical attributes. In this study, we present a straightforward approach to fabricating high-performance vdWHs photodetectors. Specifically, we prepared WSO_x/WS₂ vdWH photodetectors through the ozone oxidation of a WS₂ thin films at 100 °C. To characterize the morphology and optical properties of both the WS₂ and WSO_x/WS₂ thin films, we utilized atomic force microscopy (AFM) and Raman spectroscopy. Additionally, X-ray photoelectron spectroscopy (XPS) was employed to delve into the structural evolution by scrutinizing the bonding states of W, O, and S in the WS₂ before and after the ozone oxidation process. The resultant WSO_x/WS₂ vdWH photodetectors exhibited impressive photoelectric performance at wavelengths of 475 nm and 532 nm. It demonstrated a high responsivity of 230.7 A/W, a remarkable specific detectivity of 1.794 × 10¹¹ Jones, and a swift response speed of 60 ms at 475 nm. Furthermore, first-principles calculations based on density functional theory (DFT) were conducted to validate the oxidation kinetics of monolayer WS₂, the type II energy band alignment, and the interlayer charge transfer within the WSO_x/WS₂ vdWH. This research contributes novel insights into the synthesis of two-dimensional transition metal oxides (TMOs)-transition metal dichalcogenides (TMDCs) heterostructures for photodetector applications.

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The study focuses on the optical and electrical properties of Tungsten Ditelluride (WTe2), a type II Weyl semimetal, as well as the influence of its self-limiting oxide (SLO) layer that forms during natural oxidation. WTe2 exhibits promising applications in photodetection and energy harvesting due to its unique gapless linear dispersion and Berry-field-enhanced nonlinear optical effects. However, surface oxidation poses a challenge as it degrades the performance of WTe2. By employing spectroscopic ellipsometry and Raman spectroscopy, the progression of the oxide layer’s thickness and its impact on the optical constants of WTe2 were examined. The results revealed a rapid increase in oxide thickness within the first 24 h, and it reached saturation at ∼10 nm after 45 h of atmospheric exposure. Electrical properties were explored using Kelvin Probe Force Microscopy, uncovering a modification in surface potential and Fermi level following oxidation. Additionally, a SLO/WTe2 heterojunction device exhibited a wide region of positive and negative coexisting photocurrent, highlighting the potential for logical operations in ambient air. Finally, the mechanism of operation of the device is discussed. The electrical and optical properties of the pristine, partially oxidized and fully oxidized WTe2 are analyzed using density functional theory calculations. It shows that the SLO layer has a significant effect on the optical and electronic properties, which is instructive for future wavelength-modulated device optoelectronic logic operations.@en

This paper investigates the effects of three ageing factors (chemical, humidity, and temperature) and their interactions on the physical properties and degradation of silicone sealant used in microelectronic applications. The thermal degradation of silicone sealants was investigated by exposing samples to temperatures in the range of 150 up to 175 °C. Also, a set of samples were aged at 40 °C in a salt spray set-up with 100 % humidity in a salty atmosphere. Results showed detectable changes in the FTIR spectra of aged specimen as compared with the as-received sample. In all accelerated testing conditions, peak intensities decreased with ageing time, inferring that that the surface characteristics of the sealant is affected by ageing. Shear test results showed that with increasing the ageing time, the maximum shear stress in most cases has decreased in all ageing conditions. Also, it appears that samples with longer ageing times have experienced more elongation before failure. Results also show that salt spraying of specimens is associated with a decrease in the mechanical properties of the sealant, indicating the deleterious implications of ionic contaminations for the mechanical properties of samples.

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High-power white light-emitting diodes (LEDs) have demonstrated superior efficiency and reliability compared to traditional white light sources. However, ensuring maximum performance for a prolonged lifetime use presents a significant challenge for manufacturers and end users, especially in safety–critical applications. Thus, identifying functional anomalies and predicting the remaining useful lifetime (RUL) is of enormous importance in the operational longevity of the device. To address such challenges, this study proposes a combination of distance-based Mahalanobis distance (MD), entropy generation rate (EGR), and deep learning models for improved anomaly detection and RUL prediction accuracy. Unlike conventional health indicators based on luminous flux data that are challenging to monitor relevant optical performance, the MD and EGR methods are employed to extract in-situ monitored thermal and electrical data as new health indicators. Long short-term memory recurrent neural networks (LSTM-RNN) and convolutional neural networks (CNN) are established to detect anomalies and predict the RUL. The accelerated degradation tests of 3 W high-power white LED have been conducted, and the online and offline collected experimental data are deployed for model development and performance evaluation. The performance of the proposed methods is compared against the Illuminating Engineering Society of North America (IESNA) TM-21 method. The results indicate that LSTM-RNN, when combined with either MD or EGR, can detect anomalies with significantly fewer data (70 %) than is typically required. Furthermore, a significant improvement in prediction accuracy in RUL prediction based on MD and EGR-constructed time series health indicators and employed with the LSTM-RNN model demonstrates the effectiveness of the proposed methods.

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Ionic FETs have enormous potential for energy conversion, sensing, and ionic circuits due to their efficient regulation of the nanochannel. Here ionic FETs based on single-crystal silicon nanopores and the rectification of the fabricated devices are studied. The electrical characterization results demonstrated that since the silicon-based nanopores have the advantage of modulating the surface charge due to their semiconductor nature and benefitting from the effective 3D gating effect on the nanochannel, the magnitude and polarity of surface charge can be modulated by the gate voltage. The rectification effect can be adjusted by applying a certain voltage and fulfilling a transition between anion selectivity and cation selectivity when the surface charge polarity is reversed. Moreover, current–voltage characteristics of the reported ionic FET can be switched between ohmic and diode-like regimes. The proposed ionic FETs supply a novel platform to study the ionic properties and have great potential to be applied in large-scale ionic circuits due to their excellent performance. Finally, simulation results prove the surface charge modulated by the gate voltage determines the magnitude and direction of rectification, which is consistent with the reported experiment result.

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Low-temperature sintering technology of Ag nanoparticles is widely used in high-power electronic device packaging. Utilizing simulation methods to comprehend and control the microstructure and properties of Ag sintering materials has emerged as a prominent research area. This work uses the General Form PDE module in COMSOL to simplify the implementation of the phase field method. A two-particle model was established to explore the effects of different particle sizes and temperatures on the sintering neck of Ag nanoparticles. The two-particle model was expanded to multi-particle models and 3D models flexibly. This work presents the potential and limitations of these phase-field models, preparing for further multiphysics analysis and optimization of Ag sintering materials.@en

The increasing awareness of environmental concerns and sustainability underlines the importance of energy-efficient systems, renewable energy technologies, electric vehicles, and smart grids. Hence, stringent constraints and safety regulations have been prompted to meet reliability standards in power electronics. This chapter provides a comprehensive outlook on the current state of power semiconductor devices, field-critical applications, dominant degradation mechanism (chip-related and package-related), and the emerging measurement techniques for reliability/condition monitoring. This chapter delves into the underlying physics behind each reliability measurement method reviewed. A comparative summary of cost, complexity, online monitoring capability, accuracy, and intrusiveness is provided to enable readers to make informed decisions about the measurement methods. This chapter emphasizes the significance of early fault detection through online monitoring, as it can effectively reduce system downtime for seamless non-interruptive operation.

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During the operation of an LED array, its thermal and optical performances are always not equal to the superposition of the individual LED's characteristics because of a significant thermal coupling effect between the arrays. Based on this, this paper proposes an electrical–photo-thermal model, with considering both junction temperature and luminous flux, to predict the both the thermal and optical performances of LED arrays operated under different currents, case temperatures, and lighting methods. The junction temperature and luminous flux of a single LED operating under different driving currents and case temperature conditions are firstly collected to establish the luminous flux response surface model of a single chip. Then it is used to predict the luminous flux of an array, whose junction temperature is predicted using both thermal coupling matrix (TCM) and numerical models. Experiments verify the luminous flux of the LED array under different operation conditions and show that the proposed electrical–photo-thermal modeling can be used to predict the thermal and optical parameters of LED arrays with 95 % accuracy. Thus, it is effective for the fast prediction of the junction temperature and luminous flux of large LED systems with array structures, i.e. intelligent automotive lightings and displays.

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The hexagonal cell topology of planar SiC VDMOSFETs with varied JFET width (LJFET) are designed and manufactured in this study. L JFET=1.4μ m has the best HF-FOM (R on × Cgd) and HF-FOM (R on × Qgd) by comparing the dynamic and static parameters of each design. Besides, the UIS reliability and failure mechanism for series designs are investigated by experiment and TCAD simulation. The results show that the high temperature is generated by energy dissipation during avalanche and it drives the parasitic BJT conduction, causing Ids out of control and instantaneous heat concentration in a very short time. The extremely high temperature causes internal cracking of the material and metal melting, resulting in gate-source short circuit and device damage. It would provide suggestions for device design and reliability consideration.@en

MAlSiN₃:Eu²⁺ (M = Ca, Sr) is commonly used in high-power phosphor-converted white-light-emitting diodes and laser diodes to promote their color-rendering index. However, the wide application of this phosphor is limited by the degradation of its luminescent properties in high-temperature, high-humidity, and high-sulfur-content environment. Here, the degradation mechanism of the (Sr,Ca)AlSiN₃:Eu²⁺ (SCASN) red phosphor under thermal-moisture-sulfur coupling conditions is investigated. Furthermore, by performing first-principles calculations, the hydrolysis mechanism on an atomic scale is assessed. The adsorption energy (E_ads) and charge transfer (ΔQ) results showed that H₂O chemically adsorbed on the (0 1 0), (3 1 0), and (0 0 1) surfaces of the CaAlSiN₃ (CASN) host lattice. The energy barrier for H₂O dissociation is only 29.73 kJ mol⁻¹ on the CASN (0 1 0) surface, indicating a high dissociation probability. The formation of NH₃, Ca(OH)₂, and CaAl₂Si₂O₈ is confirmed by H⁺ tended to combine with surface N atoms, while OH⁻ combined with the surface Al/Si or Ca atoms. Moreover, ab initio molecular dynamics simulations were performed to further understand the hydrolysis process. This work offers a guidance on the design and applications of luminescent materials in LED packages with higher reliability and stability requirements in harsh environment.

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Solder joint failure is one of the most common board-level failure modes in electronic components. It is crucial for a next-generation reliability assessment method to have an in-situ health monitoring system in place to evaluate the current state of degradation. This is achieved by specialized embedded sensors and processing the data on the edge. This study focuses on monitoring the mechanical degradation of package-to-PCB solder interconnects of a WLCSP using a high-resolution piezoresistive sensor. First, a measurement workflow was set up to optimize and significantly improve the sensor readout time. Then, utilizing a design of experiments, the test specimens were subjected to certain combinations of mechanical and thermal loads in a four-point bending setup. Temperature-coupled mechanical loading showed a greater impact on the resulting stress pattern compared to that of a superposition of the corresponding individual purely thermal and mechanical load configurations. Finally, the specimens were tested under a purely mechanical load until failure, and a correlation between the recorded stress pattern and the initiation and propagation of a crack was established.@en

The primary challenges posed by oral mucosal diseases are their high incidence and the difficulty in managing symptoms. Inspired by the ability of bioelectricity to activate cells, accelerate metabolism, and enhance immunity, a conductive polyacrylamide/sodium alginate crosslinked hydrogel composite containing reduced graphene oxide (PAA-SA@rGO) is developed. This composite possesses antibacterial, anti-inflammatory, and antioxidant properties, serving as a bridge to turn the “short circuit” of the injured site into a “completed circuit,” thereby prompting fibroblasts in proximity to the wound site to secrete growth factors and expedite tissue regeneration. Simultaneously, the PAA-SA@rGO hydrogel effectively seals wounds to form a barrier, exhibits antibacterial and anti-inflammatory properties, and prevents foreign bacterial invasion. As the electric field of the wound is rebuilt and repaired by the PAA-SA@rGO hydrogel, a 5 × 5 mm² wound in the full-thickness buccal mucosa of rats can be expeditiously mended within mere 7 days. The theoretical calculations indicate that the PAA-SA@rGO hydrogel can aggregate and express SOX2, PITX1, and PITX2 at the wound site, which has a promoting effect on rapid wound healing. Importantly, this PAA-SA@rGO hydrogel has a fast curative effect and only needs to be applied for the first three days, which significantly improves patient satisfaction during treatment.

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This work addresses a novel technique for selecting the best process parameters for the 4H–SiC epitaxial layer in a horizontal hot-wall chemical vapor reactor using a transient multi-physical (thermal-fluid-chemical) simulation model and combined with a machine-learning model. An experiment was performed to validate the feasibility of the numerical model. Secondly, a single-factor analysis was conducted to investigate the effects of process parameters, including the deposition temperature, inlet-flow volume, rotational speed of the susceptor, and cavity pressure, on the quality of the 4H–SiC epitaxial layer. Finally, a machine learning algorithm, the ant colony optimization-back propagation neural network (ACO–BPNN), was employed to develop the input/output model and optimize process parameters for obtaining a high-quality epitaxial layer and reducing the optimization cycle and costs. Notably, the optimized process was validated by real experiments, where the error between calculation and experiment is 4.03 % for deposition rate and 0.49 % for coefficient of variation, respectively. The results highlight the model as reliable and lay the foundation for the CVD growth of the 4H–SiC epitaxial layer.

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Board level reliability can be of high interest for automotive electronic components when exposed to vibration-prone environments. However, the absence of an industry standard for board level vibration testing poses several challenges in establishing a well-characterized test setup. One of the challenges is that automotive applications can induce abnormal stresses on components that can lead to early failures in the field. Such loading conditions are not always covered in the current board level vibration test methods. This paper aims to correlate the stresses from automotive modules to board levels by measuring the printed circuit board (PCB) vibration spectrum. Firstly, the study compares and assesses several module board level vibration measurement units, such as LASER Doppler Vibrometer (LDV), strain gauges, and accelerometers. Experiments and simulations show that LDV enables good correlation with Micro-electro Mechanical Systems (MEMS) accelerometers. Secondly, the module-board interaction unveils insights into several module design features that impact the PCB vibration response and solder joint interconnect reliability. These findings underscore the necessity for the user to correctly validate the reliability of packages beyond board level testing, i.e., at the module level. This reliability test approach enables the translation of reliability test results from the lab to the field life of components once built in the final application equipment.

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In this study, a convenient chitosan oligosaccharide laser lithograph (COSLL) technology was developed to fabricate laser-induced graphene (LIG) electrodes and flexible on-chip microsupercapacitors (MSCs). With a simple one-step CO₂ laser, the pyrolysis of a chitosan oligosaccharide (COS) and in situ welding of the generated LIGs to engineering plastic substrates are achieved simultaneously. The resulting LIG products display a hierarchical porous architecture, excellent electrical conductivity (6.3 Ω sq^-1), and superhydrophilic properties, making them ideal electrode materials for MSCs. The pyrolysis-welding coupled mechanism is deeply discussed through cross-sectional analyses and finite element simulations. The MSCs prepared by COSLL exhibit considerable areal capacitance of over 4 mF cm^-2, which is comparable to that of the polyimide-LIG-based counterpart. COSLL is also compatible with complementary metal-oxide-semiconductor (CMOS) and micro-electro-mechanical system (MEMS) processes, enabling the fabrication of LIG/Au MSCs with comparable areal capacitance and lower internal resistance. Furthermore, the as-prepared MSCs demonstrate excellent mechanical robustness, long-cycle capability, and ease of series-parallel integration, benefiting their practical application in various scenarios. With the use of eco-friendly biomass carbon source and convenient process flowchart, the COSLL emerges as an attractive method for the fabrication of flexible LIG on-chip MSCs and various other advanced LIG devices.

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Silicon carbide (SiC) devices have shown definite advantages over Si counterparts in high-temperature, high-voltage, and high-frequency applications. To fully exploit the potentiality of SiC devices in high temperatures, die-attach materials that can withstand high temperatures for a long time are required in the power electronics packaging. In this article, the high-temperature die-attach materials, such as high-temperature solders and transient liquid-phase bonding materials, were reviewed first. Then, metallic (mainly Ag and Cu) nanoparticles (NPs) sintering technologies were thoroughly overviewed. The metallic NPs sintering materials, metallic NPs sintering process, and interface and reliability were analyzed, respectively. Finally, the challenges and outlook of promising Cu NPs sintering technology were discussed.

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Due to the deficient passivation of the interface between silicon carbide and silicon dioxide, the defect-induced capture and release of trapped charges triggered by external Bias Temperature Stress (BTS) leads to parameter shifts and degraded device performance. This study models the trap-induced transient current in silicon carbide metal-oxide-semiconductor capacitors, providing insight into how capacitance and conductance change during C-V measurements under conditions of high temperature, varied frequency, and varied applied voltage.@en

Semiconductor devices are commonly encapsulated with Epoxy-based Moulding Compounds (EMC) to form an electronic package. EMC typically occupies a large volume within a package, and thus, governs its thermomechanical behaviour. When exposed to high temperatures (150°C and above), electronic packages predominantly show oxidation of the outer layer of EMC. Oxidized EMC exhibits notably different material properties, resulting in a modified deformation pattern of a thermally aged package under varying thermal loads. As the oxidation layer grows in thickness, its mechanical properties also evolve, indicating distinct phases of the oxidized material at different stages of thermal ageing. Reflecting these changes (i.e., the current state of degradation) into a Finite Element (FE) model-based analysis can provide better insights into failure prediction and component reliability. It requires updating the geometry and material behaviour as a function of ageing. This paper presents a systematic procedure to build a continuously updated physics-based Digital Twin of a thermally aged flip-chip package that can represent intermediate oxidation stages. First, experimental measurements are carried out to quantify the growth of the oxidation thickness at 150°C and a diffusion-dominant mathematical model is proposed. Then, an accurate geometry of the test package is prepared with a parametric outer layer from all exposed sides of EMC to represent the oxidized layer at different stages of thermal ageing. Next, the experimental characterization of a few partially oxidized EMC specimens is done, and analytical methods are utilized to extract the thermomechanical properties of the oxidized EMC at different stages of ageing. Experimental warpage data of aged test packages are utilized to verify the defined material-model parameters that represent curing shrinkage, thermal expansion, glass transition, and corresponding elasticity moduli of the oxidized EMC at select stages of ageing. Then, a workflow to establish continuity in the material model is presented. Finally, the developed Digital Twin is utilized for an FE analysis to study the change in the trend of out-of-plane package deformations as a function of several stages of EMC oxidation.@en

The continuing drive to miniaturise electronic devices requires an understanding of how the materials in these devices behave under stress, particularly with respect to electromigration. In this study, we explore the relationship between the microstructure of copper (Cu) and electromigration by using an approach that combines in situ Scanning Electron Microscopy (SEM) with Electron Backscatter Diffraction (EBSD). This in-situ SEM-EBSD technique enables real-time observation and analysis of electromigration-induced microstructure changes. Our investigation provides detailed insights into the microstructure effect on electromigration. Specifically, samples annealed at 300 °C showed void formation after the electromigration test and higher Kernal average misorientation (KAM) values, indicating higher internal strains and an inhomogeneous microstructure. In contrast, samples annealed at 500 °C maintained lower KAM values with minimal changes in crystal orientation, highlighting a more stable and uniform electromigration-resistant microstructure. Our results demonstrate the critical role of microstructure in determining the electromigration resistance of copper interconnects. By optimizing the annealing temperature, the reliability of the copper microstructure can be significantly improved by reducing the dislocations and increasing grain size, thus extending its lifetime.

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This study presents a dual approach combining molecular dynamics simulations and experimental analysis to explore the sintering behavior of copper (Cu) nanoparticles. Our simulation model comprises 240 nanoparticles, through which we systematically examine the coalescence kinetics during the sintering process. The simulations provide a detailed view of the particle interactions, structural evolution, and the mechanisms driving nanoparticle fusion at the atomic level. Complementing the simulations, we conducted 3D reconstructions using Focused Ion Beam Scanning Electron Microscopy (FIB-SEM) to characterize the microstructure of the sintered nanoparticles. This hybrid approach not only deepens our understanding of the fundamental processes governing the sintering of Cu nanoparticles but also bridges the gap between theoretical predictions and experimental observations, offering insights into the optimization of sintering processes in practical applications.

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