The use of microRNAs as clinical cancer biomarkers is hindered by the absence of accurate, sensitive and rapid assays for their detection in biofluids. Here we report a biosensing approach, SpLig-HEMT, that combines an RNA splint-ligation reaction with an AlGaN/GaN high-electron-mobility transistor biosensor for ultrasensitive miRNA detection. In this system, HEMT functions as a highly effective voltage amplifier to enhance detection sensitivity, while the splint-ligation reaction ensures precise discrimination of single-nucleotide mutations. By detecting miRNA-21, the SpLig-HEMT biosensor achieves an exceptional limit of detection of 10⁻¹⁸ M within 30 min, with a dynamic range from 10⁻¹⁸ M to 10⁻¹³ M. No detectable response is observed for one-mismatch miR-21. Furthermore, the SpLig-HEMT biosensor enables direct analysis of blood serum samples, effectively distinguishing between healthy individuals and patients with ovarian cancer. This study addresses critical challenges in miRNA detection and presents a promising tool for cancer diagnosis and prognosis.

The heat produced within the device in its package depends on the power supplied to each IP block. The improper placement of an IP block with high power consumption can become a reliability risk for IC packages, as it can significantly affect the reliability of solder balls due to thermal, mechanical, and electrical factors. It also mitigates the effect of thermal cycling, because it depends upon heat management within the package. Improper IP block placement can block heat flow paths, which results in poor thermal dissipation and higher temperature which can create a higher strain on the solder balls affecting their lifetime. Therefore, it is crucial to understand the interplay between the correct placement of IP blocks and solder balls to enhance solder ball reliability. COMSOL-based simulation study will be done on a WLCSP (Wafer Level Chip Scale Package) mounted on a PCB board on which solder balls are connected to copper layers on the die and PCB sides. Variations in the placement of the IP blocks. Thermal cycling and the variations in the placement of the IP block within the package will be taken as a loading condition. Therefore, this influences the susceptibility of device failure due to solder ball fatigue. Based on board-level passive cycling, the solder balls which are located under the IP blocks are the most likely ones affected by this stress. The results will be analyzed to optimize the layout of the IP blocks, concerning accumulated plastic strain on the solder balls at different locations of the IP block placement. It can help to understand the influence of the position of the IP block, reduce stress concentration, and minimize thermal cycling effects, which leads to an increase in the reliability of the solders joint and IC package itself.

Triboelectric nanogenerator (TENG), advantageous in high energy density and flexibility, is promising as a sustainable energy source but can hardly be used to power edge devices directly due to its high-voltage AC output and varying capacitive impedance. To address it, this work proposes a power-conditioning interface with a fully integrated dual synchronous switch harvesting on capacitors (D-SSHC) rectifier for triboelectric energy extraction. Furthermore, a full digital duty-cycle-based (DCB) maximum power point tracking (MPPT) algorithm is developed to optimize the energy harvesting efficiency with simple implementation and continuous tracking. Designed and fabricated in a 0.18-μm BCD process, the proposed interface can extract energy at a maximum output voltage of 70 V. According to the measurement results, it achieves 99% MPPT efficiency and an energy extraction improvement of 598% compared to a full-bridge rectifier.

The mechanical reliability of sintered silver joints, widely used in power electronics packaging, is critical for long-term applications such as electric vehicle converters. However, conventional homogeneous modeling often oversimplifies internal microstructural variations and limits the accuracy of stress prediction, especially under thermal cycling. In this study, a region-refined modeling framework is proposed to account for epoxy-regulated porosity and mechanical inhomogeneity across the joint. Pressureless die-attach joints were prepared using submicron silver pastes with varying epoxy contents (0∼4 wt%). The joint was divided into five sub-regions from the center to the fillet for localized characterization. Nanoindentation, SEM, and EDS analyses were conducted to assess region-specific mechanical properties and microstructure. Power-law constitutive models were extracted for each region and implemented into finite element simulations of thermal cycling (−55 ∼ 150 °C, 2 cycles/h, 250 h). The sub-region FEM model more accurately captured local stress concentrations and identified failure-prone areas, particularly near the fillet, compared to conventional homogeneous models. Experimental validation confirmed a good correlation between simulated stress zones and observed degradation. This sub-region strategy provides a robust framework for reliability prediction and design optimization of sintered silver joints in high-performance, large-area packaging applications.

The mechanical strength of sintered nanoparticles (NPs) limits their application in advanced electronics packaging. In this study, we explore the anisotropy in the microstructure and mechanical properties of sintered copper (Cu) NPs by combining experimental techniques with molecular dynamics (MD) simulations. We establish a clear relationship between processing conditions, microstructural evolution, and resulting properties in pressure-assisted sintering of Cu NPs. Our findings reveal that pressure-assisted sintering induces significant anisotropy in the microstructure, as evidenced by variations in areal relative density and the orientation distribution of necks formed during sintering. Specifically, along the direction of applied pressure, the microstructure exhibits reduced variation in areal relative density and a higher prevalence of necks with favorable orientations. The resulting anisotropic mechanical properties, with significantly higher strength along the pressure direction compared to other directions, are demonstrated through micro-cantilever bending tests and tensile simulations. This anisotropy is further explained by the combined effects of strain localization (influenced by areal relative density) and the failure modes of necks (determined by their orientation relative to the loading direction). This work provides valuable insights into the analysis of sintered NPs microstructures and offers guidance for optimizing the sintering process.

This article compares and evaluates the single pulse short-circuit robustness of silicon carbide (SiC) MOSFETs with linear and hexagonal cell topologies under different gate voltages, bus voltages, and case temperatures. The short-circuit failure mechanisms of the linear and hexagonal cell topologies are studied. A new switching model for gate failure and thermal runaway short-circuit failure modes is proposed and analyzed. The robustness performance of the linear and hexagonal cell topologies is compared and evaluated under the same short-circuit power for the first time, fully revealing the comprehensive impact mechanism of cell topologies on the short-circuit robustness for SiC MOSFETs.

The study focuses on the optical and electrical properties of Tungsten Ditelluride (WTe2), a type II Weyl semimetal, as well as the influence of its self-limiting oxide (SLO) layer that forms during natural oxidation. WTe2 exhibits promising applications in photodetection and energy harvesting due to its unique gapless linear dispersion and Berry-field-enhanced nonlinear optical effects. However, surface oxidation poses a challenge as it degrades the performance of WTe2. By employing spectroscopic ellipsometry and Raman spectroscopy, the progression of the oxide layer’s thickness and its impact on the optical constants of WTe2 were examined. The results revealed a rapid increase in oxide thickness within the first 24 h, and it reached saturation at ∼10 nm after 45 h of atmospheric exposure. Electrical properties were explored using Kelvin Probe Force Microscopy, uncovering a modification in surface potential and Fermi level following oxidation. Additionally, a SLO/WTe2 heterojunction device exhibited a wide region of positive and negative coexisting photocurrent, highlighting the potential for logical operations in ambient air. Finally, the mechanism of operation of the device is discussed. The electrical and optical properties of the pristine, partially oxidized and fully oxidized WTe2 are analyzed using density functional theory calculations. It shows that the SLO layer has a significant effect on the optical and electronic properties, which is instructive for future wavelength-modulated device optoelectronic logic operations.

Sintered Cu nanoparticles (NPs) are promising for high-performance electronics due to their excellent thermal and electrical conductivity, as well as mechanical reliability. This study investigates the microscale mechanical behavior of sintered Cu NPs with a bimodal particle size distribution, focusing on strain rate and temperature effects. Micro-pillar compression tests were performed across strain rates of 0.0001 s⁻¹ to 0.01 s⁻¹ and temperatures from 25 °C to 350 °C. Results show that higher strain rates enhance yield strength through strain-rate hardening, while elevated temperatures lead to thermal softening and reduced mechanical stability. The Anand viscoplastic model accurately predicts these deformation behaviors. Microstructural analysis via scanning electron microscopy (SEM) and transmission electron microscopy (TEM) reveals localized deformation at 175 °C, with dislocations concentrated near the top surface and persistent porosity below, whereas at 350 °C, re-sintering and grain boundary diffusion create a denser microstructure. Phase-field fracture modeling further elucidates crack propagation, emphasizing the role of pore size and temperature. This combined experimental and modeling approach enhances understanding of viscoplastic deformation and fracture mechanisms in sintered Cu NPs, informing their use in interconnects, power electronics and thermal management systems.

This paper investigates the effects of three ageing factors (chemical, humidity, and temperature) and their interactions on the physical properties and degradation of silicone sealant used in microelectronic applications. The thermal degradation of silicone sealants was investigated by exposing samples to temperatures in the range of 150 up to 175 °C. Also, a set of samples were aged at 40 °C in a salt spray set-up with 100 % humidity in a salty atmosphere. Results showed detectable changes in the FTIR spectra of aged specimen as compared with the as-received sample. In all accelerated testing conditions, peak intensities decreased with ageing time, inferring that that the surface characteristics of the sealant is affected by ageing. Shear test results showed that with increasing the ageing time, the maximum shear stress in most cases has decreased in all ageing conditions. Also, it appears that samples with longer ageing times have experienced more elongation before failure. Results also show that salt spraying of specimens is associated with a decrease in the mechanical properties of the sealant, indicating the deleterious implications of ionic contaminations for the mechanical properties of samples.

Silicon-Carbide (SiC) MOSFETs are widely used in high-power and high-efficiency applications such as electric vehicles and power supplies. However, long-term reliability remains a critical concern, particularly under extreme operating conditions. This work aims to explain the health monitoring of SiC metal oxide-semiconductor field effect transistors (MOSFETs) through precise junction temperature (T_j) profiling based on performed measurements. The study focuses on the temperature-dependent behavior of the on-resistance (RDS(on)), a key parameter that varies with the aging, degradation, and temperature of the device. By systematically measuring R_DS(on) at different temperatures and at various stages of the operating life of the device, we can establish a predictive model to assess the health of SiC MOSFETs. The importance of pulse duration of the drain current is stressed to avoid the self-heating effect with some device physics insights. The proposed methodology enables better understanding of the SiC MOSFET performance for future real-time condition monitoring, facilitating early failure detection and lifetime estimation. This approach provides valuable information for improving reliability and optimizing maintenance strategies in power electronics systems. Experimental results validate the effectiveness of the proposed method and give direction for future research opportunities.

Sintered materials have been widely applied, as an alternative to soldering, for power electronics packaging. One key issue for such die-attach material is to characterize the actual porosity, which is difficult to obtain through SEM cross-section analysis. Therefore, in this work, the optimized Quartet Structure Generation Set (QSGS) algorithm was applied to sintered copper joints under various porosity levels to reconstruct 3D porous structures based on 2D SEM images. Firstly, copper joints with varying porosities were fabricated under different sintering conditions. Reconstructed 3D porous copper models were then generated through the QSGS algorithm to match experimental observations, including porosity and pore size. Finite element analysis (FEA) simulations were further conducted to explore the effects of pores on thermal and electrical performance. This work provides a method for accurately predicting the thermoelectric properties of sintered copper joints and insights for optimizing copper sintering in power electronics applications.

This Letter presents a combined analytical and experimental method to effectively decouple the radial and tangential residual stress fields induced by Berkovich nanoindentation in single-crystalline 4H-SiC using micro-Raman spectroscopy. By integrating the Raman stress characterization model with Yoffe’s expanding cavity model, precise extraction of individual residual stress components around the indentation region is realized. Through the vertical backscattering micro-Raman mapping of the E2 phonon mode, we systematically investigate the residual stress distribution near the indentation. The results highlight significant anisotropy in nanoindentation-induced stress fields, strongly dependent on the crystal orientation of 4H-SiC, predominantly featuring radial tensile stress gradients. This comprehensive theoretical–experimental approach offers a robust optical framework for residual stress characterization in 4H-SiC and provides foundational insights for extending Raman spectroscopy-based stress characterization to other crystalline materials and related device structures.

This study investigates the microstructure evolution and mechanical behavior of bimodal-sized sintered copper (Cu) nanoparticles (NPs) under varying sintering pressures. Micro-pillar compression tests reveal a transition from collapse-dominated to compaction-driven deformation as sintering pressure increases. Transmission electron microscopy (TEM) and transmission Kikuchi diffraction (TKD) analyses identify a two-stage deformation mechanism—initial pore compaction followed by intragranular slip—fundamentally distinct from bulk Cu. Molecular dynamics (MD) simulations further reveal that large particles promote dislocation-mediated plasticity by accommodating intragranular slip, while small particles enhance load transfer through localized shear-compaction, together enabling uniform strain distribution and supporting the experimentally observed strain accommodation. The resulting microstructure achieves a combination of high yield strength (up to 320 MPa) and low elastic modulus (20 GPa), offering a compliant yet robust response. These findings elucidate a unique processing–structure–property relationship and provide a rational basis for designing porous metal interconnects capable of withstanding thermomechanical stresses in advanced electronic packaging.

While silver-based sintered materials are limited by cost and electromigration, and copper faces challenges with oxidation at high temperatures, Cu-based composite sintering materials offer promising alternative solutions. This review examines recent advances in Cu-based composite sintered materials for die-attach in power electronics packaging, focusing on their mechanical, thermal, electrical properties, and reliability. This review systematically categorizes such compounding strategies, including direct mixing, core-shell structures, and alloying, analyzing the impact on composite properties. Furthermore, the reliability of Cu-based composite sintered joints is evaluated, addressing high-temperature storage, thermal cycling, corrosion, and electrochemical migration. Challenges such as oxidation resistance, process optimization, and cost-effectiveness are discussed, together with future research directions. This work aims to support researchers in advancing Cu-based composite sintering materials research and development, broadening material options for high-temperature power electronics packaging applications.

Power electronics devices, pivotal in advancing electronic system technology, are essential for energy saving, enhancing power control efficiency, reducing noise, and minimizing size and volume. The evolution of power modules is based on innovative packaging structures, technologies, and materials. This article provides a comprehensive review of inorganic nonmetallic packaging materials and technologies in power electronics packaging. It first analyzes the packaging structures and trends of power electronics. The article then discusses inorganic nonmetallic encapsulants such as cement and glass in detail. It also reviews traditional ceramic substrates and elaborates on the advantages of multilayer ceramic technologies, including low-temperature co-fired ceramics, as substrates, while looking forward to the commercialization of inorganic composite substrates such as SiCp/Al matrix composites and diamond. Subsequently, the article overviews inorganic nonmetallic fillers for thermal interface materials, emphasizing the application of two-dimensional materials such as graphene and boron nitride, and introduces inorganic nonmetallic phase change materials. Finally, it explores the application and future development trends of inorganic nonmetallic materials in embedded packaging technologies.

This study presents a novel approach for localized silver (Ag) nanoparticles (NPs) sintering using microheater arrays embedded within the Si substrate. By applying controlled pulse currents, these microheaters generate targeted heat pulses, enabling rapid and localized sintering while maintaining the surrounding device components at room temperature. This localized heating minimizes thermal stress caused by thermal expansion mismatches, as sintering completes within milliseconds. Compared to conventional sintering techniques, this method improves process efficiency, reduces power consumption, and provides precise spatial control over the sintered regions. The proposed approach offers a promising alternative for microelectronics packaging and integration, particularly in applications requiring precise thermal management.

Nano-copper (nano-Cu) sintering is a promising lead-free interconnection technology for advanced electronic packaging due to its high electrical conductivity. However, practical applications are hindered by oxidation and limited sintering efficiency. Carbon nanotube (CNT) doping has been proposed to modify sintering behavior by influencing diffusion and interfacial interactions. In this study, molecular dynamics (MD) simulations and experiments were combined to investigate the effects of CNT doping on nano-Cu sintering and interconnection performance.Two MD models were constructed: a Cu NP–CNT dual-particle model to examine interfacial interactions, and a multi-particle model to evaluate overall sintering dynamics. Results show that Cu nanoparticle size significantly affects sintering, with 4 nm particles exhibiting optimal energy reduction at 500 K, while 2 nm particles show stronger bonding at 700 K due to partial melting. CNT doping in the multi-particle system increased defect density, improving bonding strength but compromising electrical and thermal conductivity.Experimentally, nano-Cu pastes doped with various CNT types and contents were tested. A 1 wt% CNT addition enhanced shear strength, while higher contents led to agglomeration, reduced uniformity, and degraded electrical performance. SEM revealed CNT accumulation at sintering necks, and XPS indicated potential interfacial reactions involving functional groups on CNTs.Overall, CNTs play a dual role in nano-Cu sintering—enhancing mechanical performance via defect formation but reducing conductivity due to interfacial resistance. Optimizing CNT surface chemistry and dispersion is essential to balance mechanical and electrical properties in future interconnect applications.

Electronic components are complex systems consisting of a combination of different materials, which undergo degenerative changes over time following the second law of thermodynamics. The loss of their quality or functionality is reflected in degraded performance or behaviour of electronic components, which can lead to failures during their operation lifetime. Thus, it is crucial to understand the physics of material degradation and the factors causing it to ensure component reliability. This paper focuses on the physics-of-degradation of packaging materials, which are typically exposed the most to the environmental and operating loads. The content of this article is organised into three parts. First, an overview of the packaging technology and encapsulating materials is presented. Then, the most common degradation-causing factors and package-associated failure modes are reviewed. Lastly, the hardware requirements are discussed, including specialised sensors, measurement techniques, and Digital Twins, to capture the degradation effects and facilitate component-level health monitoring for microelectronics.

With the rapid development of new energy vehicles and offshore wind power systems in coastal cities, the application scale of power devices is constantly increasing. However, the corrosion problem of power packaging interconnection materials caused by the humid air and chlorine-rich environment near the sea is gradually emerging. This study addresses the corrosion protection of sintered nano-copper by innovatively employing atmospheric pressure plasma jet (APPJ) technology with hexamethyldisiloxane (HMDSO) as precursor to construct organic-inorganic hybrid hydrophobic coatings on copper surfaces. Experimental results demonstrate that the coating exhibits a three-dimensional crosslinked Si-O network structure. The synergistic effect between surface micron-scale spherical clusters and methyl groups elevates the contact angle by 50 % to 153.1° Electrochemical characterization reveals that the coating positively shifts corrosion potential by 0.035 V and reduces corrosion current density from 6.008×10−7 A/cm2 to 5.542×10−7 A/cm2, while maintaining higher activation energy across the experimental temperature range (30–60℃). EIS tests show that the coating effectively increases the charge transfer impedance of the sample, indicating an improvement in corrosion resistance. The 168-hour immersion test confirms effective barrier against Cl−corrosive attack with preserved substrate integrity. Density functional theory (DFT) simulations elucidate that unsaturated methylated fragments in HMDSO preferentially graft onto copper surface via chemisorption, where strong interfacial bonding energies (-2.26 ∼ -4.38 eV) facilitate cleavage and crosslinking to form stable siloxane networks. This work proposes a novel anti-corrosion surface engineering strategy for copper interconnects, while revealing the plasma-induced interfacial bonding mechanisms of hybrid coatings, providing both theoretical and experimental foundations for developing durable electronic packaging materials.

This study investigates the interface strength and fracture behavior of sintered copper (Cu) nanoparticles (NPs) for all-Cu integration in advanced microelectronics packaging. Micro-cantilever bending tests on three configurations (Cu NP-notched, interface-notched and un-notched micro-cantilevers) were analyzed using scanning electron microscopy (SEM), transmission electron microscopy (TEM), transmission Kikuchi diffraction (TKD) and cohesive zone model (CZM). The interface-notched micro-cantilevers demonstrate superior fracture resistance, with a stress intensity factor (K_Q) of 2.88±0.10 MPa m^1/2, compared to 2.12±0.11 MPa m^1/2 for Cu NP-notched micro-cantilevers. Simulation results, consistent with experimental results, reveal that Cu NP-notched micro-cantilevers exhibit lower fracture resistance due to porosity and stress concentrations, while interface-notched micro-cantilevers show enhanced strength, attributed to robust bonding and reduced void distribution. Un-notched micro-cantilevers display superior load-bearing capacity, with cracks bypassing the interface and propagating through porous regions. Moreover, in un-notched micro-cantilevers, a synergistic deformation mechanism is observed, where crack propagation through the sintered Cu NPs coexists with plastic slip deformation in the Cu substrate. These findings highlight the strong interfacial bonding and effective stress transfer at the Cu substrate-sintered Cu NP interface, validating the feasibility of direct sintering using Cu NPs without additional coatings.