Understanding the atomic diffusion features in metallic material is significant to explain the diffusion-controlled physical processes. In this paper, using electromigration experiments and molecular dynamic (MD) simulations, we investigate the effects of grain size and temperature on the self-diffusion of polycrystalline aluminium (Al). The mass transport due to electromigration are accelerated by increasing temperature and decreasing grain size. Magnitudes of effective diffusivity (Deff) and grain boundary diffusivity (DGBs) are experimentally determined, in which theDeffchanges as a function of grain size and temperature, butDGBsis independent of the grain size, only affected by the temperature. Moreover, MD simulations of atomic diffusion in polycrystalline Al demonstrate those observations from experiments. Based on MD results, the Arrhenius equation ofDGBsand empirical formula of the thickness of grain boundaries at various temperatures are obtained. In total,DeffandDGBsobtained in the present study agree with literature results, and a comprehensive result of diffusivities related to the grain size is presented.@en

This paper presented integrated electromigration (EM) studies through experiment, theory, and simulation. First, extensive EM tests were performed using Blech and standard wafer-level electromigration acceleration test (SWEAT)-like structures, which were fabricated on four-inch wafers. Second, a molecular dynamics (MD) simulation-based diffusion-induced strain was incorporated into the existing coupled theory. Third, one-dimensional (1D) governing equations in terms of atomic concentration for un-passivated and passivated configurations were derived for void formation and growth, using a modified Eshelby's solution to consider the effect of passivation. Fourth, a systematic approach was established, including theoretical formulations and experimental methods, to obtain key material properties, i.e., critical atomic concentration and diffusivity. We then determined the material's properties from a specific set of experimental data, using aluminium (Al) as a carrier for demonstration. These properties were then used to predict the time to failure and void growth under various conditions. The theoretical results agreed well with the experimental data. Moreover, we theoretically determined the critical threshold products of current density and conductor length for the un-passivated and passivated configurations, respectively. Both experiment and theory showed that, in the absence of mechanical stress in un-passivated configurations, the atomic self-diffusion, which was opposite to electron wind, was significant in resisting EM development. However, when mechanical stress was present, such as in passivated configurations, stress migration played a dominant role in resisting EM development. Our numerical results showed that the current density exponent n in Black's law remained as 2 in the range of the current density greater than 0.2 MA/cm2 and rapidly approached infinity at a low level of current density.@en

This paper presented a comprehensive experimental and simulation study for thermomigration (TM) accompanying electromigration (EM) at elevated current densities. Both Blech and standard wafer-level electromigration acceleration test (SWEAT)-like test structures, with aluminum (Al) as a carrier, were used for testing and analysis. In Part I of our study (Cui et al., 2023a), the experimental and numerical results with the current density of 1 MA/cm2 were presented. We observed that Al stripes with a SWEAT structure did not show damage in the entire length, while Blech structures showed void and hillock formations only at the cathode and anode, respectively. The temperature gradient owing to Joule heating was neglected in our previous simulations, and the predicted results agreed well with the experimental observations. However, we have not theoretically verified the effect of the temperature gradient. In this paper, we first reported the new experimental data under the elevated current densities of 3 and 5 MA/cm2. In both Blech and SWEAT structures, the spreading of voids in the middle region of conductors was observed. Moreover, in Blech structures, voiding in the middle region occurred after a period of time when voids/hillocks were formed at the cathode and anode, while the SWEAT structures did not show damage at the two ends. Next, based on the coupled 3D theory (Cui et al., 2023a), new analytical one-dimensional (1D) solutions were derived for the Blech and SWEAT structures in the un-passivated configuration considering TM. We found that TM played a significant role in the EM development in the middle of conductors under the elevated current density. The numerical results were in excellent agreement with the experimental data with the consideration of TM. We further established new EM failure's threshold criteria for the SWEAT structures in the form of the product of current density and square of conductor length. This is a major departure from the original Blech's theory in which only mechanical stress gradient was considered. We also studied the acceleration factor of the current density exponent and presented an insight into failure mechanisms associated with TM.@en

The continuous downscaling of microelectronics has introduced many reliability issues on interconnect. Electromigration and dewetting are major reliability concerns in high-temperature micro- and nanoscale devices. In this paper, the local dewetting of copper thin film during the electromigration test was first found and investigated. When the high current was applied, the dewetted copper forming around the edge was observed at the cathode of the conductor. Furthermore, the effect of temperature and conductor size on local dewetting was investigated. Our proposed mechanism for local dewetting is in good agreement with experimental findings.@en

The 4H-silicon carbide (SiC) exhibits excellent material characteristics, particularly in high-temperature, high-power, high-frequency applications. However, the reliability of SiC-based devices operating in harsh environments is a critical concern. While time-dependent dielectric breakdown (TDDB) in conventional SiC devices has been extensively studied, its behavior in SiC MOSFETs within CMOS technology remains largely unexplored. In this work, we analyzed the effect of temperature and device size on TDDD failure time while employing failure analysis to identify two distinct failure structures. The finding of this research enhances the understanding of TDDB failure mechanisms and provides valuable insights for improving device reliability.@en

The 4H-silicon carbide (SiC) exhibits excellent material characteristics, particularly in high-temperature, high-power, high-frequency applications. However, the reliability of SiC-based devices operating in harsh environments is a critical concern. While time-dependent dielectric breakdown (TDDB) in conventional SiC devices has been extensively studied, its behavior in SiC MOSFETs within CMOS technology remains largely unexplored. In this work, we analyzed the effect of temperature and device size on TDDD failure time while employing failure analysis to identify two distinct failure structures. The finding of this research enhances the understanding of TDDB failure mechanisms and provides valuable insights for improving device reliability.@en

Due to the deficient passivation of the interface between silicon carbide and silicon dioxide, the defect-induced capture and release of trapped charges triggered by external Bias Temperature Stress (BTS) leads to parameter shifts and degraded device performance. This study models the trap-induced transient current in silicon carbide metal-oxide-semiconductor capacitors, providing insight into how capacitance and conductance change during C-V measurements under conditions of high temperature, varied frequency, and varied applied voltage.@en

Due to the deficient passivation of the interface between silicon carbide and silicon dioxide, the defect-induced capture and release of trapped charges triggered by external Bias Temperature Stress (BTS) leads to parameter shifts and degraded device performance. This study models the trap-induced transient current in silicon carbide metal-oxide-semiconductor capacitors, providing insight into how capacitance and conductance change during C-V measurements under conditions of high temperature, varied frequency, and varied applied voltage.@en

As the dimensions of interconnects in integrated circuits continue to shrink, an urgent need arises to understand the physical mechanism associated with electromigration. Using x-ray nanodiffraction, we analyzed the stresses in Blech-structured pure Cu lines subjected to different electromigration conditions. The results suggest that the measured residual stresses in the early stages of electromigration are related to relaxation of stresses caused by thermal expansion mismatch, while a developing current-induced stress leads to reductions in the residual stress after longer test times. These findings not only validate the feasibility of measuring stress in copper lines using nanodiffraction but also highlight the need for a further understanding, particularly through in situ electromigration experiments with x-ray nanodiffraction analysis.@en