Various bias-flip rectifiers were proposed to improve the energy extraction performance for piezoelectric energy harvesting (PEH), which requires a power supply. However, no stable power supply is available when the system starts from a cold state. Typically, during the cold state, the system operates as a passive full bridge rectifier (FBR) to build up a stable power supply by charging a capacitor and then switching to the active rectifier after the cold state. Unfortunately, the system cannot start up if the open circuit voltage from a piezoelectric transducer (PT) is lower than the required supply voltage level. As a result, the system would end up with cold startup failure. This paper proposes a 2-mode bias-flip rectifier, which addresses the startup issue by lowering the required input open circuit voltage from the PT. The proposed design was fabricated in a 180-nm BCD process. Measurement results show that the necessary open-circuit voltage from the PT is lowered by 73% to achieve a successful cold startup, and the proposed system achieves 1182% energy extraction enhancement compared to a passive FBR.

Triboelectric nanogenerator (TENG), advantageous in high energy density and flexibility, is promising as a sustainable energy source but can hardly be used to power edge devices directly due to its high-voltage AC output and varying capacitive impedance. To address it, this work proposes a power-conditioning interface with a fully integrated dual synchronous switch harvesting on capacitors (D-SSHC) rectifier for triboelectric energy extraction. Furthermore, a full digital duty-cycle-based (DCB) maximum power point tracking (MPPT) algorithm is developed to optimize the energy harvesting efficiency with simple implementation and continuous tracking. Designed and fabricated in a 0.18-μm BCD process, the proposed interface can extract energy at a maximum output voltage of 70 V. According to the measurement results, it achieves 99% MPPT efficiency and an energy extraction improvement of 598% compared to a full-bridge rectifier.

Bias-flip rectifiers are commonly employed for piezoelectric energy harvesting (PEH). This article proposes a synchronized switch harvesting on an inductor (SSHI) rectifier with a duty-cycle-based (DCB) maximum power point tracking (MPPT) algorithm. The proposed DCB MPPT algorithm is based on the mathematically derived relation between the MPPT efficiency and the duty cycle of the bridge rectifier. The resulting equation shows that the MPPT efficiency only depends on the rectifier duty cycle, and is independent of any other system variables, such as voltage bias-flipping efficiency, the open-circuit voltage from the harvester, vibration frequency, etc. As a result, MPPT can be achieved by regulating the duty cycle, simplifying circuit implementation, and achieving self-regulating and continuous MPPT. This design was fabricated in a 180-nm BCD process. The measured results show 98% peak MPPT efficiency and up to 738% output power enhancement.

The various application scenarios of triboelectric nanogenerator (TENG) have attracted increasing research interest, while one of the biggest challenges is the energy extraction efficiency. Due to the small and time-varying inherent capacitor in a TENG, the previous energy extraction techniques e.g., full-bridge rectifier (FBR) and bias-flip (BF) rectifier, performed not well. To extract more energy from TENG, this article proposed a fully integrated switched-capacitor (SC) rectifier with an electrostatic charge boosting (ECB) technique, achieving simultaneous extraction from the synchronized triboelectric energy and self-excited electrostatic energy. The proposed rectifier was fabricated in a 180-nm BCD process. With the proposed ECB technique, the theoretical analysis and measurements show a quadratically increasing output power with respect to the rectification voltage, attaining a constant maximum power point (MPP) at the breakdown voltage of the circuit. A maximum output power of 127.6 μ W is measured with a TENG fabricated in-house. Compared to a passive FBR, the proposed rectifier enhances the output power by 14 times.

This article presents a 10mV-startup-voltage thermoelectric energy harvesting system, assisted by a piezoelectric generator (PEG) as a cold starter. It exploits the fact that when a thermoelectric energy harvesting system is implemented in a place where kinetic energy is also present, the PEG starter can provide a clock signal to start the system. Thanks to the high output impedance of the PEG, the generated clock voltage can easily go over several hundreds of mV, which can be used to drive the boost converter to harvest thermoelectric energy even at an extremely low thermoelectric generator (TEG) voltage. The proposed system was fabricated in a 180-nm BCD process. The measurement results show that the TEG system can start up from the cold state with a TEG voltage as low as 10 mV while maintaining a 63.9% efficiency. The peak power conversion efficiency reaches 83.7% when the TEG voltage is 55 mV.

Piezoelectric energy harvesting (PEH) is a promising approach to collecting ambient kinetic energy as the power supply for electronic devices. In many PEH designs, the maximum power point tracking (MPPT) technique is exploited to enhance the output power of the system. However, a typical PEH system requires a separate power stage for MPPT, which requires a large external rectified capacitor for MPPT operation and suffers from cascaded power efficiency loss. This paper presents an MPPT-integrated bias-flip rectifier where the MPPT and AC-DC rectifier are merged into one stage, resulting in fewer off-chip capacitors, faster MPPT, and less cascaded energy loss. The proposed circuit was fabricated in a 0.18μm CMOS process, and the measurement results show a 7.7 × energy extraction enhancement.

Piezoelectric energy harvesting (PEH) has been considered a promising solution for replacing conventional batteries to power wireless sensors. A complete PEH system typically includes three stages: ac-dc rectification, maximum power point tracking (MPPT), and output voltage regulation to power the load circuits. Unfortunately, most prior works focus only on the first one or two stages. A few employ three, but unfortunately, they are in cascaded stages, which results in cascaded power efficiency loss. This article proposes a single-stage bias-flip MPPT regulating rectifier (BMRR), which integrates the active bias-flip rectification, MPPT, and output voltage regulation into one stage. The proposed BMRR transfers energy from the piezoelectric transducer (PT) directly to the output capacitor by employing fewer switches, removing the conventional bridge rectifier, and eliminating cascaded energy loss. In addition, the design was implemented in a fully digital fast-MPPT technique based on an improved duty-cycle-based (DCB) algorithm to let the PT voltage jump to the maximum power point (MPP) in only one step. The proposed BMRR rectifier was fabricated in a 180-nm BCD process. The measured results show 930% power enhancement compared to a full bridge rectifier (FBR) and 92.5% end-to-end (E2E) efficiency.

Synchronized rectifiers offer promising solutions for piezoelectric energy harvesting; however, achieving the promised energy extraction performance necessitates using either a bulky inductor or multiple large capacitors, which cannot be on-chip integrated and increase the system form factor. This article introduces a fully integrated sequenced synchronized switch harvesting on capacitors (3SHC) rectifier. The input piezoelectric transducer (PT) uses microelectromechanical system technology. The cantilever is equally split into multiple strongly coupled subcantilevers, with each cantilever treated as an individual PT connected to the proposed rectifier. The 3SHC rectifier cyclically operates multiple times to synchronously flip the voltage of each cantilever sequentially. With the proposed design, all the flying capacitors only need to match the capacitance of each subcantilever; hence, they can be fully integrated on-chip. The design is fabricated using standard 0.18 μ m CMOS technology. Measurement results show that the proposed 3SHC rectifier attains an 80% voltage flip efficiency and achieves a 730% power enhancement compared to a full-bridge rectifier.

Synchronized bias-flip rectifiers, such as synchronized switch harvesting on inductor (SSHI) rectifiers, are widely used for piezoelectric energy harvesting (PEH) [1], which can replace the use of batteries in many loT applications, thus reducing both system volume and maintenance cost. However, the output power extracted by such rectifiers strongly depends on the impedance matching between the piezoelectric transducer (PT) and the circuit. To maximize this, two maximum power point tracking (MPPT) algorithms are often used. As shown in Fig. 30.3.1 (left), the Perturb & Observe (P&O) (a.k.a. hill-climbing) algorithm adjusts the rectified output power in a stepwise manner towards the maximum power point (MPP), thus establishing robust and continuous MPPT. However, accurately sensing the rectified output power often requires complex and power-hungry hardware [1], [2]. Another simpler algorithm is based on the fractional open-circuit voltage (FOCV) and involves periodically measuring the PT's open-circuit voltage amplitude (VOC) and regulating the rectified voltage (VREC) to a level (VMPP), which corresponds to the MPP [3-6]. However, the PT must be periodically disconnected from the rectifier to measure VOC, resulting in wasted energy, while the inherent delay in sensing VOC variations reduces the overall tracking efficiency. Furthermore, a calibration step is usually necessary to determine VMPP, since this depends on the actual PT voltage flip efficiency (etaF) of the bias-flip rectifier.

In the past decades, inductor-based synchronized switch harvesting on inductor (SSHI) rectifiers have been widely employed in many active rectification systems for piezoelectric energy harvesting. Although SSHI rectifiers achieve high energy extraction performance compared to passive full-bridge rectifier (FBR), the performance greatly depends on the inductor employed. While a larger inductor can achieve higher performance, the system form factor is also increased, which is counter to system miniaturization in many applications. To solve this issue, an efficient synchronized switch harvesting on capacitors (SSHC) rectifier was proposed recently. Instead of using large inductors, the SSHC rectifier employs on-chip or off-chip flying capacitors to achieve comparable or higher performance. In previous studies, the flying capacitors are chosen equal to the inherent capacitance of the piezoelectric transducer (PT) to achieve 1/3 voltage flipping efficiency (η F) for a 1-stage SSHC rectifier and 4/5 flipping efficiency for a 8-stage SSHC rectifier. This brief presents that the flipping efficiency can be further increased to 1/2 for a 1-stage SSHC rectifier if the flying capacitor is chosen to be much larger than C P and the 4/5 flipping efficiency can be achieved by employing only 4 flying capacitors.

Synchronized ac-dc rectifiers are widely used for energy rectification in piezoelectric energy harvesting (PEH), which have to employ a bulky inductor or some dedicated flying capacitors for high energy conversion efficiency. This article proposes a synchronized switch harvesting on shared capacitors (SSHSC) rectifier achieving synchronized voltage flipping without inductors or dedicated flying capacitors for PEH. The proposed SSHSC rectifier employs only three energy-storage capacitors with a specific capacitance ratio (3:3:1). These three capacitors mainly serve as storage capacitors; they can also be reused as flying capacitors for bias-flip operations. Thanks to the capacitor-sharing technique, this SSHSC rectifier takes a small volume and fewer I/O pads compared to prior SSHC rectifiers. This design was fabricated in a 180-nm BCD process, and the measured results show 78% voltage flipping efficiency and 7.58 × power enhancement.

Large errors can be introduced in traditional acoustic emission (AE) source localization methods using extracted signal features such as arrival time difference. This issue is obvious in the case of irregular structural geometries, complex composite structure types or presence of cracks in wave travel paths. In this study, based on a novel deep learning algorithm called deep residual network (DRN), a structural health monitoring (SHM) strategy is proposed for AE source localization through classifying and recognizing the AE signals generated in different sub-regions of critical areas in structures. Hammer hits and pencil-leak break (PLB) tests were carried out on a steel-concrete composite slab specimen to register time-domain AE signals under multiple structural damage conditions. The obtained time-domain AE signals were then converted into time-frequency images as inputs for the proposed DRN architecture using the continuous wavelet transform (CWT). The DRNs were trained, validated and tested by AE signals generated from different source types at various damage states of the slab specimen. The proposed DRN architecture shows an effective potential for AE source localization. The results show that the DRN models pre-trained by the AE signals obtained in the undamaged specimen are able to accurately classify and identify the locations of different types of AE sources with 3–4.5 cm intervals even when multiple cracks with widths up to 4–6 mm are present in the wave travel paths. Moreover, the influence factors on the model performance are investigated, including structural damage conditions, sensor-to-source distances and AE sensor mounting positions; in accordance with the parametric analyses, recommendations are proposed for the engineering application of the proposed SHM strategy.

Ultrasonic wireless power transfer (WPT) has been proved to be a promising approach to power biomedical implants. To extract the energy generated from the transducer, a rectifier is typically required. Previous inductor-based rectifiers (SSHI and SECE) require a large off-chip inductor to achieve good performance, which is not desired for miniaturization and safety reasons. Synchronized switch harvesting on capacitors (SSHC) rectifiers have been proved to achieve high performance without inductors; however, they are mainly designed for low-frequency kinetic energy harvesting. In this paper, an improved SSHC rectifier is designed to achieve a fully integrated design with all flying capacitors implemented on-chip. The proposed SSHC rectifier can properly operate at ultrasonic excitation frequency (100 KHz) with precise switching time control and ultrafast voltage flipping techniques. In addition, an on-chip ultralow-power LDO allows the system to be self-sustained. The system is designed in a TSMC 180nm BCD technology and post-layout simulation results are presented.

Synchronized switch harvesting on inductor (SSHI) rectifier has been verified as an efficient active rectifier to harvest kinetic energy in piezoelectric energy harvesting (PEH) system. Compared with passive rectifiers, active rectifiers including SSHI rectifier require a stable power supply to drive switches. However, when the system starts from the cold state, the required power supply is not available at first. For the active rectifiers, the active circuits work as a typical full bridge rectifier (FBR) until the stable power supply is built up. Unfortunately, a FBR cannot build up a stable power supply when the input open circuit voltage VOC is lower than the required power supply, resulting in disabled active rectifiers. This paper proposes a 2-mode reconfigurable SSHI rectifier design for low input VOC. By this method, the requirement for the input VOC is 3.2X lower than a FBR. The proposed system is designed in a 0.18µm process and post-layout simulations verify the cold start-up process under low VOC voltage.

A nanopower highly efficient low-dropout (LDO) regulator for energy harvesting (EH) applications is presented in this paper. The LDO is fully autonomous with a bandgap reference (BGR) featuring a novel bandgap supply-switching (SS) topology, an over-voltage protection (OVP), a under-voltage lockout (UVLO) and control block to obtain stable output and robust cold-start. The system provides configurable voltage supply (1.1 \sim2V) for potential loads, while consuming as low as 66 nW power. The entire system achieves a peak power efficiency of 95.6% at Vout=2V and I-{\iota-{oad}}=100\muA.

Synchronized switch harvesting on inductor (SSHI) is an efficient active rectifier to extract energy generated from piezoelectric transducer in piezoelectric energy harvesting system. Unlike passive rectifiers, SSHI rectifiers require a power supply to drive synchronized switches. Unfortunately, there is no stable supply when the system starts from the cold state. Most designs let the system work as a passive full bridge rectifier (FBR) to charge power capacitor until a supply is available. However, a FBR requires high open-circuit voltage (VOC) and the FBR’s output voltage cannot go over VOC. This prevents the system from starting the SSHI rectifier if VOC is low. This paper proposes a new transducer reconfiguration design to lower the required VOC by 4 $\times$ to start up the SSHI system from the cold state. The proposed system is designed in a 0.18$-\mu$m BCD process and post-layout simulations show that the successful cold-startup under low VOC voltage.

Harvesting energy from environments has been a promising approach to power ubiquitously distributed Internet of Things (IoT) devices. For harvesting kinetic energy with piezoelectric transducers, synchronized switch harvesting on capacitors (SSHC) rectifiers have been demonstrated to achieve high energy extraction performance without using any inductor. In previous studies, the switched capacitors in SSHC rectifiers are chosen equal to the inherent capacitance of the piezoelectric transducer (PT) to achieve good voltage flip efficiencies at 33.3%, 50% and 66.7% for 1-, 2- and 4-stage SSHC rectifiers, respectively. However, with much larger switched capacitors and the same SMD package size, this paper finds that the voltage flip efficiency can be further increased to 50%, 66.7% and 80% for 1-, 2- and 4-stage SSHC rectifiers, respectively; as a result, the output power can be greatly increased. This paper also finds that the proposed design only requires half number of capacitors to achieve the same voltage flip efficiency for conventional SSHC rectifiers, which significantly reduces the system form factor for miniaturization.