With the rapid development of the Internet of Things (IoT), piezoelectric energy harvesting has emerged as a highly promising power solution for autonomous IoT devices. To increase the extracted energy from the harvesters, various rectifiers have been developed. Bias-flip rectifiers, one of the most widely used rectifiers, utilize extra components to periodically flip the voltage across the harvester to achieve higher output power. This work proposes a bias-flip rectifier with an energy investment technique to boost the total harvesting power. By optimizing the energy invested from the load to the harvester and the loading conditions, the circuit can achieve higher FoM compared to conventional SSHI rectifiers under the same configurations. The proposed circuit was designed in a 180-nm BCD process, the simulation results show a 5.97 X energy enhancement compared to a full bridge rectifier (FBR) and a 1.2 X enhancement compared to conventional synchronized switch harvesting on inductor (SSHI) rectifiers.

A triboelectric nanogenerator (TENG) is a novel device that utilizes contact electrification and electrostatic induction to convert mechanical energy into electrical energy. Its characteristics include high energy density and flexibility, enabling self-powering of electronic devices by harvesting mechanical energy from the environment. Its applications include biomedical devices, wearable electronics, and Internet-of-Things (IoT) sensors. Despite these advantages, extracting electrical energy from TENG remains challenging due to its time-varying nature and low internal capacitance. Effective power-management techniques are essential for TENG energy-harvesting systems, yet research on dedicated integrated power-conversion methods is currently limited. Given the growing interest in TENG, a comprehensive exploration of energy-harvesting systems is critically necessary. This article synthesizes and compares current advancements in triboelectric energy-harvesting systems, emphasizing strategies to enhance output power through various power-conversion techniques. Additionally, it explores techniques employed in other energy-harvesting systems to inspire innovative approaches in TENG system design.

This article presents a self-powered, bipolar, rectifierless series synchronized switch harvesting on inductor (BiReL-SSHI) interface circuit for piezoelectric energy harvesting. At both the positive and negative peaks of the piezoelectric transducer (PZT) voltage, a synchronous switch is automatically activated, enabling energy transfer from the PZT to a storage capacitor, while the inductor simultaneously inverts the PZT voltage for the next half cycle. Compared to conventional full-bridge rectifiers (FBRs) and series synchronized switch harvesting on inductor circuits, the BiReL-SSHI topology employs fewer components by optimizing the positive and negative synchronous switches, thereby reducing power loss and improving energy extraction efficiency. Experimental results show that the BiReL-SSHI achieves a 5.4× improvement in power extraction compared to an FBR, when the open-circuit voltage (V _oc) of the PZT is 8 V. Furthermore, in scenarios where a high V _oc is converted to a low output voltage, the BiReL-SSHI achieves superior energy transfer efficiency compared to other interface circuits. Experimental results further demonstrate that at a 3.3 V output under identical vibration conditions, the BiReL-SSHI delivers 5.86× higher output power than the FBR.

Triboelectric nanogenerator (TENG), advantageous in high energy density and flexibility, is promising as a sustainable energy source but can hardly be used to power edge devices directly due to its high-voltage AC output and varying capacitive impedance. To address it, this work proposes a power-conditioning interface with a fully integrated dual synchronous switch harvesting on capacitors (D-SSHC) rectifier for triboelectric energy extraction. Furthermore, a full digital duty-cycle-based (DCB) maximum power point tracking (MPPT) algorithm is developed to optimize the energy harvesting efficiency with simple implementation and continuous tracking. Designed and fabricated in a 0.18-μm BCD process, the proposed interface can extract energy at a maximum output voltage of 70 V. According to the measurement results, it achieves 99% MPPT efficiency and an energy extraction improvement of 598% compared to a full-bridge rectifier.

Various bias-flip rectifiers were proposed to improve the energy extraction performance for piezoelectric energy harvesting (PEH), which requires a power supply. However, no stable power supply is available when the system starts from a cold state. Typically, during the cold state, the system operates as a passive full bridge rectifier (FBR) to build up a stable power supply by charging a capacitor and then switching to the active rectifier after the cold state. Unfortunately, the system cannot start up if the open circuit voltage from a piezoelectric transducer (PT) is lower than the required supply voltage level. As a result, the system would end up with cold startup failure. This paper proposes a 2-mode bias-flip rectifier, which addresses the startup issue by lowering the required input open circuit voltage from the PT. The proposed design was fabricated in a 180-nm BCD process. Measurement results show that the necessary open-circuit voltage from the PT is lowered by 73% to achieve a successful cold startup, and the proposed system achieves 1182% energy extraction enhancement compared to a passive FBR.

This article presents a 6.78-MHz switching-mode wireless power transfer (WPT) receiver (RX) with single-stage dual-output regulation and improved adaptability to link variations for biomedical applications. Based on a modified voltage doubler topology, it optimally transitions between voltage mode (VM) and resonant current mode (RCM) to extend the WPT range without compromising efficiency or delivered power. Seamless mode transition is achieved with no dead zones or output undershoots, thanks to the proposed quasi-open-circuit mode detection leveraging existing operational states without power-carrier interferences. The essential advantages of switching mode are consolidated via transient modeling. To meet dual-voltage-domain supply requirement in bio-implants, the RX uses stacked dc nodes in the voltage doubler to generate two regulated outputs with only three power switches. Designed and fabricated in a 180-nm CMOS technology, the proposed RX regulates two dc outputs at 1.8 and 3.3 V, respectively, with unobservable load-transient over/undershoots and cross-regulations. Using a 3.3-V-supplied class-D transmitter (TX), a 13.5-mm-radius TX coil, and an 11.5-mm-radius RX coil, the RX achieves a maximum WPT range of 7.5 cm under both 50-kΩ load conditions, demonstrating a 42% extension compared with VM-only operation. Real-time mode transition is validated through coil separation distance transients between 3 and 5.5 cm. In addition, with adaptive delay compensation in both VM and RCM operations, the RX achieves a peak power conversion efficiency (PCE) of 92.3% at a maximum output power of 171 mW.

A single transmitter source can power multiple ultrasound piezoelectric transducers to enhance the harvested power; however, the received ultrasonic signals vary in phase and amplitude across each element. This paper introduces a fully integrated, high-frequency SSHC rectifier tailored for miniaturized multi-piezo implants to efficiently harvest power at variable phase offsets with a compact form factor. The design incorporates a novel phase-splicing flipping capacitor-sharing technique between all four ultrasound piezoelectric transducers to improve area efficiency. The proposed 4-stage SSHC rectifier can harvest 5.94x more power than a full bridge rectifier operating at a high ultrasonic excitation frequency of 780 kHz. The proposed system was designed using 180-nm BCD process technology for a 2x2 piezoelectric transducer array, with each element featuring an internal capacitor (C_P) of 63.7pF.

This article presents a reconfigurable piezoelectric harvester array (RPA) designed for multi-input systems, which dynamically configures its structure based on the intensity of ambient vibrations. The proposed architecture enhances system efficiency by eliminating dc–dc converters and achieving maximum power point tracking through a single power stage. It also widens the input range by serially connecting PEH units, enabling operation at lower excitation levels. Additionally, this series connection reduces equivalent parasitic capacitance, improving flip efficiency and maximum output power improving rate (MOPIR).The proposed RPA is employed with classical parallel-synchronous switch harvesting on inductor technology and implemented using a 180 nm CMOS process. Experimental results demonstrate a conversion efficiency of up to 78%, an MOPIR of 5.93, and a minimum input voltage of 0.36 V. This highly integrated, wide-input-range, and energy-efficient scheme offers a novel approach to miniaturizing PEH systems. We present detailed design principles, operational mechanisms, and performance metrics, highlighting the RPA’s potential as a scalable and environmentally friendly solution for powering next-generation Internet of Thing devices.

Bias-flip rectifiers are commonly employed for piezoelectric energy harvesting (PEH). This article proposes a synchronized switch harvesting on an inductor (SSHI) rectifier with a duty-cycle-based (DCB) maximum power point tracking (MPPT) algorithm. The proposed DCB MPPT algorithm is based on the mathematically derived relation between the MPPT efficiency and the duty cycle of the bridge rectifier. The resulting equation shows that the MPPT efficiency only depends on the rectifier duty cycle, and is independent of any other system variables, such as voltage bias-flipping efficiency, the open-circuit voltage from the harvester, vibration frequency, etc. As a result, MPPT can be achieved by regulating the duty cycle, simplifying circuit implementation, and achieving self-regulating and continuous MPPT. This design was fabricated in a 180-nm BCD process. The measured results show 98% peak MPPT efficiency and up to 738% output power enhancement.

When driving a GaN switch, the maximum transition speed of drain-source voltage (peak dv/dt) should meet specification. But reducing the peak dv/dt usually exacerbates V-I overlap loss. This work presents a GaN driver for buck converter featuring: 1) voltage-controlled peak dv/dt; 2) almost constant dv/dt during Miller Plateau (MP) for reducing V-I overlap loss. We analyze why a constant dv/dt minimizes V-I overlap loss under a peak dv/dt specification, how to maintain a constant dv/dt during the MP period, and propose an implementable solution. We use a sensing block to judge whether the peak dv/dt violates the specification, and an adaptive searching scheme to find out the key parameters for the targeted constant dv/dt. We designed the layout with a 180-nm SOI process, and simulation results show that the peak dv/dt is well under control. It saves up to 33.99% V-I overlap loss when compared with the conventional constant current driver scheme.

The various application scenarios of triboelectric nanogenerator (TENG) have attracted increasing research interest, while one of the biggest challenges is the energy extraction efficiency. Due to the small and time-varying inherent capacitor in a TENG, the previous energy extraction techniques e.g., full-bridge rectifier (FBR) and bias-flip (BF) rectifier, performed not well. To extract more energy from TENG, this article proposed a fully integrated switched-capacitor (SC) rectifier with an electrostatic charge boosting (ECB) technique, achieving simultaneous extraction from the synchronized triboelectric energy and self-excited electrostatic energy. The proposed rectifier was fabricated in a 180-nm BCD process. With the proposed ECB technique, the theoretical analysis and measurements show a quadratically increasing output power with respect to the rectification voltage, attaining a constant maximum power point (MPP) at the breakdown voltage of the circuit. A maximum output power of 127.6 μ W is measured with a TENG fabricated in-house. Compared to a passive FBR, the proposed rectifier enhances the output power by 14 times.

This paper presents a Switching-Mode Regulating Rectifier (SM-RR) with single-stage dual-output regulation for biomedical wireless power transfer applications. To achieve both a high power conversion efficiency (PCE) and a long power transfer distance, the proposed SM-RR can seamlessly switch its operation between voltage mode and resonant current mode. To meet multi-power-rail requirements in loading circuits, it employs only three power transistors to provide two regulated outputs with parallel pulse-frequency modulation, which achieves unobservable cross-regulations. The prototype chip, fabricated in a 180 nm CMOS process, achieves two regulated outputs at 1.8 V and 3.3 V, respectively, up-to- 92.33% PCE, and up-to-42% transfer range extension compared to conventional voltage-mode receivers.

Synchronized rectifiers offer promising solutions for piezoelectric energy harvesting; however, achieving the promised energy extraction performance necessitates using either a bulky inductor or multiple large capacitors, which cannot be on-chip integrated and increase the system form factor. This article introduces a fully integrated sequenced synchronized switch harvesting on capacitors (3SHC) rectifier. The input piezoelectric transducer (PT) uses microelectromechanical system technology. The cantilever is equally split into multiple strongly coupled subcantilevers, with each cantilever treated as an individual PT connected to the proposed rectifier. The 3SHC rectifier cyclically operates multiple times to synchronously flip the voltage of each cantilever sequentially. With the proposed design, all the flying capacitors only need to match the capacitance of each subcantilever; hence, they can be fully integrated on-chip. The design is fabricated using standard 0.18 μ m CMOS technology. Measurement results show that the proposed 3SHC rectifier attains an 80% voltage flip efficiency and achieves a 730% power enhancement compared to a full-bridge rectifier.

The growing trend of the Internet of Things (IoT) involves trillions of sensors in various applications. An extensive array of parameters need to be gathered concurrently with high-precision, low-cost, and low-power sensor nodes, such as resistive (R) and capacitive (C) sensors. Single-chip channel fusion can be an effective solution, while it is challenging to suppress the noise and integrate massive I/O pads. However, conventional oversampling noise-shaping methods increase power consumption, which fails to meet the demand of long-term monitoring applications. In addition, existing R/C sensor-interface chips require a pair of I/O pads for each sensor, where the pad frame dominates the overall chip area in massive-channel integration. In this work, we demonstrate a 72-channel R&C sensor-interface chip for proximity-and-temperature sensing. A noise-orthogonalizing technique is proposed to eliminate the quantization noise at the signal frequencies, achieving an energy efficiency of 19.1 pJ/step/channel. Moreover, a pad-sharing technique is proposed to reduce the number of I/O pads by half, enabling 72 sensors to be read by 36 pairs of I/O pads. The chip is fabricated by 65-nm CMOS technology, and measurement results show resolutions of 286 Omega and 162 fF, respectively. The power consumption and die area are reduced to 0.74 mu text{W} /Channel and 0.038 mm2/Channel, respectively.

Piezoelectric energy harvesting (PEH) is a promising approach to collecting ambient kinetic energy as the power supply for electronic devices. In many PEH designs, the maximum power point tracking (MPPT) technique is exploited to enhance the output power of the system. However, a typical PEH system requires a separate power stage for MPPT, which requires a large external rectified capacitor for MPPT operation and suffers from cascaded power efficiency loss. This paper presents an MPPT-integrated bias-flip rectifier where the MPPT and AC-DC rectifier are merged into one stage, resulting in fewer off-chip capacitors, faster MPPT, and less cascaded energy loss. The proposed circuit was fabricated in a 0.18μm CMOS process, and the measurement results show a 7.7 × energy extraction enhancement.

This article presents a 13.56-MHz wireless power transfer (WPT) system with coupling variation robustness and high efficiency for powering biomedical implantable devices (IMDs). To sustain reliable power transfer against inductive-link fluctuation, a hybrid voltage-/current-mode (V/CM) receiver (RX) is proposed to provide CM recovery when the coupling becomes weak for VM operation. To optimize the end-to-end (E2E) efficiency, a digital pulsewidth modulation (PWM)-based global power regulation technique is proposed, which allows a fully on/off operation of the three-mode power amplifier (PA) at the transmitter (TX) side and fast load-transient responses. Moreover, the system adopts a fully integrated voltage-sensing load-shift-keying (LSK) demodulation technique, which replaces conventional current sensing methods with a streamlined implementation and reduced power consumption. Both prototype TX and RX chips were fabricated in a 180-nm CMOS process. The proposed system, powered by a 1.8-V supply at TX, realizes a regulated 1.8-V dc output at RX. With the help of the hybrid V/CM RX, the proposed system achieves an up-to-150% WPT range extension compared to VM-only operation and an up to 7.2-cm WPT range. Benefiting from the global digital-PWM regulation, it achieves up to 72.3% E2E efficiency over the loading range from 0.18 to 81 mW. A 10- μ s load-transient recovery is also attained at a 164 × load step with a 110-mV undershoot and unnoticeable overshoots.

This article proposes a novel collaborative-flip synchronized switch harvesting on capacitors (CF-SSHCs) rectifier and multioutput synchronous dc-dc converters with shared capacitors. Compared to the traditional SSHC, our CF-SSHC rectifier can increase the number of flipping phases, potentially enhancing the flipping efficiency and output power under specific conditions where C FLY is close to C_P. The synchronous dc-dc converters reuse the flying capacitors to achieve a high maximum output power improving rate (MOPIR) over a limited input power range and provide multiple outputs. This work achieves an advanced number of flipping phases in capacitor-based rectifier interface technology and explores multiple-input multiple-output configurations, evaluating the system's performance under periodic and shock conditions for the first time. The system's adaptability to various piezoelectric transducer (PT) array configurations is validated, highlighting its potential for Internet of Things (IoT) networks. The design is fabricated in standard 0.18- μ m CMOS. Measurement results demonstrate that the voltage flipping efficiency of up to 83% is achieved. Compared with full-bridge rectifier (FBR), the MOPIR can be increased to 5.06 × and 4.78 × under off-resonance and on-resonance excitation, respectively. It can also achieve a 2.14 × power enhancement under shock excitation. Additionally, when the input power P INFBR is in the range of 1.42-28.4 μ W, the MOPIR of the proposed system is always greater than 4.

Body Channel Communication (BCC) utilizes the body surface as a low-loss signal transmission medium, reducing the power consumption of wireless wearable devices. However, the effective communication range on the human body is limited in the state-of-the-art BCC transceivers, where the signal loss between the body surface and the BCC receiver remains one of the main bottlenecks. To reduce the interface loss, a high input impedance is desired by the BCC receiver, but the DC-biasing circuits decrease the input impedance. In this work, a dynamically-sampling IFE is proposed to eliminate the DC voltage bias, resulting in a 90kΩ; high input impedance and a 94dB RF—IF conversion gain to reduce the interface loss in long-range BCC applications. The BCC transceiver chip is fabricated in 55nm CMOS process, taking a die area of 0.123mm². Measured results show that the chip extends the BCC range to 2m for both the forward and backward paths, where the transmitter and receiver consume 711μW power in total.